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參數(shù)資料
| 型號： | MPC826XAVR |
| 廠商： | Motorola, Inc. |
| 英文描述： | Hardware Specifications |
| 中文描述： | 硬件規(guī)格 |
| 文件頁數(shù)： | 15/48頁 |
| 文件大?。?/td> | 662K |
| 代理商： | MPC826XAVR |
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MOTOROLA
MPC826xA (HiP4) Family Hardware Specifications
15
Electrical and Thermal Characteristics
Figure 5 shows the SCC/SMC/SPI/I
2
C external clock.
Figure 5. SCC/SMC/SPI/I
2
C External Clock Diagram
Figure 6 shows the SCC/SMC/SPI/I
2
C internal clock.
Figure 6. SCC/SMC/SPI/I
2
C Internal Clock Diagram
Serial CLKin
SCC/SMC/SPI/I2C input signals
(See note.)
SCC/SMC/SPI/I2C output signals
(See note.)
sp18b
sp19b
sp38b/sp39b
Note
: There are four possible timing conditions for SCC and SPI:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
BRG_OUT
SCC/SMC/SPI/I2C input signals
(See note.)
SCC/SMC/SPI/I2C output signals
(See note.)
sp18a
sp19a
sp38a/sp39a
Note
: There are four possible timing conditions for SCC and SPI:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
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