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參數(shù)資料
| 型號： | MPC826XA |
| 廠商： | Motorola, Inc. |
| 英文描述： | Hardware Specifications |
| 中文描述： | 硬件規(guī)格 |
| 文件頁數(shù)： | 29/48頁 |
| 文件大?。?/td> | 662K |
| 代理商： | MPC826XA |
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MOTOROLA
MPC826xA (HiP4) Family Hardware Specifications
29
Pinout
1.4
Pinout
This section provides the pin assignments and pinout list for the MPC826xA.
1.4.1
Pin Assignments
Figure 13 shows the pinout of the MPC826xA’s 480 TBGA package as viewed from the top surface.
1001_000
66/33 MHz
4/8
266 MHz
2.5
166 MHz
4
66 MHz
1001_001
66/33 MHz
4/8
266 MHz
3
200 MHz
4
66 MHz
1001_010
66/33 MHz
4/8
266 MHz
3.5
233 MHz
4
66 MHz
1001_011
66/33 MHz
4/8
266 MHz
4
266 MHz
4
66 MHz
1001_100
66/33 MHz
4/8
266 MHz
4.5
300 MHz
4
66 MHz
1010_000
66/33 MHz
4/8
266 MHz
2.5
222 MHz
3
88 MHz
1010_001
66/33 MHz
4/8
266 MHz
3
266 MHz
3
88 MHz
1010_010
66/33 MHz
4/8
266 MHz
3.5
300 MHz
3
88 MHz
1010_011
66/33 MHz
4/8
266 MHz
4
350 MHz
3
88 MHz
1010_100
66/33 MHz
4/8
266 MHz
4.5
400 MHz
3
88 MHz
1011_000
66/33 MHz
4/8
266 MHz
2
212MHz
2.5
106 MHz
1011_001
66/33 MHz
4/8
266 MHz
2.5
265 MHz
2.5
106 MHz
1011_010
66/33 MHz
4/8
266 MHz
3
318 MHz
2.5
106 MHz
1011_011
66/33 MHz
4/8
266 MHz
3.5
371 MHz
2.5
106 MHz
1011_100
66/33 MHz
4/8
266 MHz
4
424 MHz
2.5
106 MHz
1
The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency
is divided by 2 (33 instead of 66 MHz, etc.) and the CPM multiplication factor is multiplied by 2. Refer to
Table 14.
2
Input clock frequency is given only for the purpose of reference. User should set MODCK_H–MODCK_L so
that the resulting configuration does not exceed the frequency rating of the user’s part.
3
Core frequency = (60x bus frequency)(core multiplication factor)
4
Bus frequency = CPM frequency / bus division factor
5
In this mode, PCI_MODCK must be “1”.
Table 18. Clock Configuration Modes in PCI Agent Mode (Continued)
MODCK_H –
MODCK[1–3]
Input Clock
Frequency
(PCI)
1,2
CPM
Multiplication
Factor
1
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency
3
Bus Division
Factor
60x Bus
Frequency
4
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