參數(shù)資料
型號： MPC8260ACZUMIBB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 266 MHz, RISC PROCESSOR, PBGA480
封裝： 37.50 X 37.50 MM, TBGA-480
文件頁數(shù)： 10/40頁
文件大?。?/td> 527K
代理商： MPC8260ACZUMIBB
18
MPC8260 (HiP3) Hardware Specications
MOTOROLA
Clock Conguration Modes
1.3
Clock Conguration Modes
To congure the main PLL multiplication factor and the core, CPM, and 60x bus frequencies, the
MODCK[1–3] pins are sampled while HRESET is asserted. Table 12 shows the eight basic conguration
modes. Another 49 modes are available by using the conguration pin (RSTCONF) and driving four pins
on the data bus.
NOTE
Clock congurations change only after POR is asserted.
1.3.1
Local Bus Mode
Table 12 describes default clock modes for the MPC8260.
Table 13 describes all possible clock congurations when using the hard reset conguration sequence.
Note also that basic modes are shown in boldface type.
Table 12. Clock Default Modes
MODCK[1–3]
Input Clock
Frequency
CPM Multiplication
Factor
CPM
Frequency
Core Multiplication
Factor
Core
Frequency
000
33 MHz
3
100 MHz
4
133 MHz
001
33 MHz
3
100 MHz
5
166 MHz
010
33 MHz
4
133 MHz
4
133 MHz
011
33 MHz
4
133 MHz
5
166 MHz
100
66 MHz
2
133 MHz
2.5
166 MHz
101
66 MHz
2
133 MHz
3
200 MHz
110
66 MHz
2.5
166 MHz
2.5
166 MHz
111
66 MHz
2.5
166 MHz
3
200 MHz
Table 13. Clock Configuration Modes1
MODCK_H–MODCK[1–3]
Input Clock
Frequency2,3,4
CPM Multiplication
Factor2, 5
CPM
Frequency2
Core Multiplication
Factor2, 6
Core
Frequency2
0001_000
33 MHz
2
66 MHz
4
133 MHz
0001_001
33 MHz
2
66 MHz
5
166 MHz
0001_010
33 MHz
2
66 MHz
6
200 MHz
0001_011
33 MHz
2
66 MHz
7
233 MHz
0001_100
33 MHz
2
66 MHz
8
266 MHz
0001_101
33 MHz
3
100 MHz
4
133 MHz
0001_110
33 MHz
3
100 MHz
5
166 MHz
0001_111
33 MHz
3
100 MHz
6
200 MHz
0010_000
33 MHz
3
100 MHz
7
233 MHz
0010_001
33 MHz
3
100 MHz
8
266 MHz
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