參數(shù)資料
型號： MPC8245TVV300D
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 300 MHz, RISC PROCESSOR, PBGA352
封裝： 35 X 35 MM, 1.65 MM HEIGHT, 1.27 MM PITCH, LEAD FREE, TBGA-352
文件頁數(shù)： 19/68頁
文件大?。?/td> 1143K
代理商： MPC8245TVV300D
MPC8245 Integrated Processor Hardware Specifications, Rev. 9
26
Freescale Semiconductor
Electrical and Thermal Characteristics
Table 13 provides the I2C frequency divider register (I2CFDR) information for the MPC8245.
3
SCL/SDA rise time (from 0.5 V to 2.4 V)
—
1
ms
4
Data hold time
0
—
ns
2
5
SCL/SDA fall time (from 2.4 V to 0.5 V)
—
1
ms
6
Clock high period
(time needed to either receive a data bit or
generate a START or STOP)
5.0
—
CLKs
1, 2, 5
7
Data setup time
3.0
—
ns
3
8
Start condition setup time (for repeated start
condition only)
4.0
—
CLKs
1,2
9
Stop condition setup time
4.0
—
CLKs
1, 2
Notes:
1. Units for these specifications are in SDRAM_CLK units.
2. The actual values depend on the setting of the digital filter frequency sampling rate (DFFSR) bits in the frequency divider
register, I2CFDR. Therefore, these timings are relative to qualified signals. The qualified SCL and SDA are delayed in
comparison to real time on the I2C bus. The qualified SCL, SDA signals are delayed by the SDRAM_CLK clock times DFFSR
times 2 plus 1 SDRAM_CLK clock. The resulting delay value is added to the value in the table (where this note is referenced).
See Figure 17 for the I2C timing diagram II.
3. Timing is relative to the sampling clock (not SCL).
4. FDR[x] refers to the frequency divider register I2CFDR bit x.
5. Input clock low and high periods in combination with the FDR value in the frequency divider register (I2CFDR) determine the
maximum I2C input frequency. See Table 13.
Table 13. MPC8245 Maximum I2C Input Frequency
FDR
Hex 2
Divider 2
(Dec)
Max I2C Input Frequency 1
SDRAM_CLK
@ 33 MHz
SDRAM_CLK
@ 50 MHz
SDRAM_CLK
@ 100 MHz
SDRAM_CLK
@ 133 MHz
20, 21
160, 192
1.13 MHz
1.72 MHz
3.44 MHz
4.58 MHz
22, 23, 24, 25
224, 256, 320, 384
733
1.11 MHz
2.22 MHz
2.95 MHz
0, 1
288, 320
540
819
1.63 MHz
2.18 MHz
2, 3, 26, 27, 28,
29
384, 448, 480, 512, 640,
768
428
649
1.29 MHz
1.72 MHz
4, 5
576, 640
302
458
917
1.22 MHz
6, 7, 2A, 2B, 2C,
2D
768, 896, 960, 1024,
1280, 1536
234
354
709
943
8, 9
1152, 1280
160
243
487
648
A, B, 2E,
2F, 30, 31
1536, 1792, 1920,
2048, 2560, 3072
122
185
371
494
C, D
2304, 2560
83
125
251
335
Table 12. I2C Input AC Timing Specifications (continued)
Num
Characteristic
Min
Max
Unit
Notes
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