
xxxiv
MPC8240 Integrated Processor User's Manual
MOTOROLA
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Chapter 3, òSignal Descriptions and Clocking,ó provides descriptions of the
MPC8240s external signals. It describes each signals behavior when the signal is
asserted and negated and when the signal is an input or an output.
Chapter 4, òAddress Maps,ó describes how the MPC8240 in host mode supports two
address mapping conTgurationsaddress map A and address map B.
Chapter 5, òConTguration Registers,ó describes the programmable conTguration
registers of the MPC8240.
Chapter 6, òMPC8240 Memory Interface,ó describes the memory interface of the
MPC8240 and how it controls the processor and PCI interactions to main memory.
Chapter 7, òCentral Control Unit,ó describes the internal buffering and arbitration
logic of the MPC8240 central control unit (CCU).
Chapter 8, òPCI Bus Interface,ó provides a rudimentary description of PCI bus
operations. The speciTc emphasis is directed at how the MPC8240 implements the
PCI bus.
Chapter 9, òDMA Controller,ó describes how the DMA controller operates on the
MPC8240.
Chapter 10, òMessage Unit (with I
2
O),ó describes a mechanism to facilitate
communications between host and peripheral processors.
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Chapter 11, òI
2
C Interface,ó describes a simple, efTcient method of data exchange
between IC devices. The I
2
C interface allows the MPC8240 to exchange data with
other I
2
C devices such as microcontrollers, EEPROMs, real-time clock devices, A/D
converters, and LCDs.
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Chapter 12, òEmbedded Programmable Interrupt Controller (EPIC),ó provides a
description of a general purpose interrupt controller solution using the EPIC module
of the MPC8240.
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Chapter 13, òError Handling and Exceptions,ó describes how the MPC8240 handles
different error conditions.
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Chapter 14, òPower Management,ó describes the many hardware support features
provided by the MPC8240 for power management.
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Chapter 15, òDebug Features,ó describes the MPC8240 features that aid in the
process of system bring-up and debug.
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Appendix A, òPowerPC Instruction Set Listings,ó lists all the PowerPC instructions
while indicating those instructions that are not implemented by the MPC8240; it
also includes the instructions that are speciTc to the MPC8240. Instructions are
grouped according to mnemonic, opcode, function, and form. Also included is a
quick reference table that contains general information, such as the architecture
level, privilege level, and form, and indicates if the instruction is 64-bit and optional.
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Appendix B, òBit and Byte Ordering,ó describes the big- and little-endian modes
and provides examples of each.
This manual also includes a glossary and an index.
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