參數(shù)資料
型號(hào)： MPC745BPX400LX
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, RISC PROCESSOR, PBGA255
封裝： 21 X 21 MM, 2.80 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-255
文件頁數(shù)： 35/48頁
文件大?。?/td> 1265K
代理商： MPC745BPX400LX
40
MPC755 RISC Microprocessor Hardware Specifications
System Design Information
Figure 26. COP Connector Diagram
There is no standardized way to number the COP header shown in Figure 26; consequently, many different
pin numbers have been observed from emulator vendors. Some are numbered top-to-bottom then
left-to-right, while others use left-to-right then top-to-bottom, while still others number the pins counter
clockwise from pin 1 (as with an IC). Regardless of the numbering, the signal placement recommended in
Figure 26 is common to all known emulators.
The QACK signal shown in Table 19 is usually hooked up to the PCI bridge chip in a system and is an input
to the MPC755 informing it that it can go into the quiescent state. Under normal operation this occurs during
a low power mode selection. In order for COP to work the MPC755 must see this signal asserted (pulled
down). While shown on the COP header, not all emulator products drive this signal. To preserve correct
power down operation, QACK should be merged so that it also can be driven by the PCI bridge.
Table 19 shows the pin definitions.
Table 19. COP Pin Definitions
Pins
Signal
Connection
Special Notes
1TDO
TDO
2
QACK
Add 2k pulldown to ground. Must be merged with on-board QACK, if
any.
3TDI
TDI
4TRST
TRST
Add 2k pulldown to ground. Must be merged with on-board TRST, if any.
5
RUN/STOP
No Connect
Used on 604e; leave no-connect for all other processors.
6
VDD_SENSE
VDD
Add 2k pullup to OVDD (for short circuit limiting protection only).
7TCK
TCK
8CKSTP_IN
CKSTP_IN
Optional. Add 10k pullup to OVDD. Used on several emulator products.
Useful for checkstopping the processor from a logic analyzer of other
external trigger.
9TMS
TMS
3
C
K
STP_OUT
13
9
5
1
6
10
2
TOP VIEW
15
11
7
16
12
8
4
KEY
No pin
HRESET
SRESET
TM
S
RUN/ST
OP
TCK
TDI
TDO
G
roun
d
TRST
VDD_SE
N
S
E
Pins 10, 12 and 14 are no-connects.
Pin 14 is not physically present
QACK
CHKSTP_
IN
相關(guān)PDF資料
PDF描述
MPC755BPX300LX 32-BIT, 300 MHz, RISC PROCESSOR, PBGA360
MPC755BRX400LX 32-BIT, 400 MHz, RISC PROCESSOR, CBGA360
MPC755BRX450LE 32-BIT, 450 MHz, RISC PROCESSOR, CBGA360
MPC755CPX400 32-BIT, 400 MHz, RISC PROCESSOR, PBGA360
MPC755BVT300 32-BIT, 300 MHz, RISC PROCESSOR, PBGA360
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