參數(shù)資料
型號: MPC7410RX450LD
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 450 MHz, RISC PROCESSOR, CBGA360
封裝: 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁數(shù): 28/52頁
文件大小: 943K
代理商: MPC7410RX450LD
34
MPC7410 RISC Microprocessor Hardware Specifications
MOTOROLA
System Design Information
Figure 19. PLL Power Supply Filter Circuit No.1
Figure 20. PLL Power Supply Filter Circuit No. 2
1.8.3
Decoupling Recommendations
Due to the MPC7410 dynamic power management feature, large address and data buses, and high operating
frequencies, the MPC7410 can generate transient power surges and high frequency noise in its power
supply, especially while driving large capacitive loads. This noise must be prevented from reaching other
components in the MPC7410 system, and the MPC7410 itself requires a clean, tightly regulated source of
power. Therefore, it is recommended that the system designer place at least one decoupling capacitor at each
VDD, OVDD, and L2OVDD pin of the MPC7410. It is also recommended that these decoupling capacitors
receive their power from separate VDD, (L2)OVDD, and GND power planes in the PCB, utilizing short
traces to minimize inductance.
These capacitors should have a value of 0.01 or 0.1 F. Only ceramic SMT (surface mount technology)
capacitors should be used to minimize lead inductance, preferably 0508 or 0603 orientations, where
connections are made along the length of the part.
In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB,
feeding the VDD, L2OVDD, and OVDD planes, to enable quick recharging of the smaller chip capacitors.
These bulk capacitors should have a low ESR (equivalent series resistance) rating to ensure the quick
response time necessary. They should also be connected to the power and ground planes through two vias
to minimize inductance. Suggested bulk capacitors—100–330 F (AVX TPS tantalum or Sanyo OSCON).
1.8.4
Connection Recommendations
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level through a resistor. Unused active low inputs should be tied to OVDD. Unused active high inputs should
be connected to GND. All NC (no connect) signals must remain unconnected.
Power and ground connections must be made to all external VDD, OVDD, L2OVDD, and GND pins of the
MPC7410. Note that power must be supplied to L2OVDD even if the L2 interface of the MPC7410 will not
be used; the remainder of the L2 interface may be left unterminated.
VDD
AVDD (or L2AVDD)
10
2.2 F
GND
Low ESL Surface Mount Capacitors
VDD
AVDD
51
GND
Capacitor
Pad Sites
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