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參數(shù)資料
| 型號： | MPC603EFE100LX |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 100 MHz, RISC PROCESSOR, CQFP240 |
| 封裝： | 32 X 32 MM, 0.50 MM PITCH, WIRE BOND, CERAMIC, QFP-240 |
| 文件頁數(shù)： | 12/32頁 |
| 文件大?。?/td> | 149K |
| 代理商： | MPC603EFE100LX |
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2
PID6-603e Hardware Specifications, Rev 2
To
locate
any
published
errata
or
updates
for
this
document,
refer
to
the
website
at
http://www.mot.com/powerpc/ or at http://www.chips.ibm.com/products/ppc.
1.1 Overview
The 603e is a low-power implementation of the PowerPC microprocessor family of reduced instruction set
computer (RISC) microprocessors. The 603e implements the 32-bit portion of the PowerPC architecture
specication, which provides 32-bit effective addresses, integer data types of 8, 16, and 32 bits, and
oating-point data types of 32 and 64 bits. For 64-bit PowerPC microprocessors, the PowerPC architecture
provides 64-bit integer data types, 64-bit addressing, and other features required to complete the 64-bit
architecture.
The 603e provides four software controllable power-saving modes. Three of the modes (the nap, doze, and
sleep modes) are static in nature, and progressively reduce the amount of power dissipated by the processor.
The fourth is a dynamic power management mode that causes the functional units in the 603e to
automatically enter a low-power mode when the functional units are idle without affecting operational
performance, software execution, or any external hardware.
The 603e is a superscalar processor capable of issuing and retiring as many as three instructions per clock.
Instructions can execute out of order for increased performance; however, the 603e makes completion
appear sequential.
The 603e integrates ve execution units—an integer unit (IU), a oating-point unit (FPU), a branch
processing unit (BPU), a load/store unit (LSU), and a system register unit (SRU). The ability to execute ve
instructions in parallel and the use of simple instructions with rapid execution times yield high efciency
and throughput for 603e-based systems. Most integer instructions execute in one clock cycle. The FPU is
pipelined so a single-precision multiply-add instruction can be issued every clock cycle.
The 603e provides independent on-chip, 16-Kbyte, four-way set-associative, physically addressed caches
for instructions and data, as well as on-chip instruction and data memory management units (MMUs). The
MMUs contain 64-entry, two-way set-associative, data and instruction translation lookaside buffers (DTLB
and ITLB) that provide support for demand-paged virtual memory address translation and variable-sized
block translation. The TLBs and caches use a least-recently used (LRU) replacement algorithm. The 603e
also supports block address translation through the use of two independent instruction and data block
address translation (IBAT and DBAT) arrays of four entries each. Effective addresses are compared
simultaneously with all four entries in the BAT array during block translation. In accordance with the
PowerPC architecture, if an effective address hits in both the TLB and BAT array, the BAT translation takes
priority.
The 603e has a selectable 32- or 64-bit data bus and a 32-bit address bus. The 603e interface protocol allows
multiple masters to compete for system resources through a central external arbiter. The 603e provides a
three-state coherency protocol that supports the exclusive, modied, and invalid cache states. This protocol
is a compatible subset of the MESI (modied/exclusive/shared/invalid) four-state protocol and operates
coherently in systems that contain four-state caches. The 603e supports single-beat and burst data transfers
for memory accesses, and supports memory-mapped I/O.
The 603e uses an advanced, 3.3-V CMOS process technology and maintains full interface compatibility
with TTL devices.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC603EFE100TN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PowerPC 603e RISC Microprocessor Family: PID6-603e (Stretch) Part Number Specifications |
| MPC603EFE133LN | 制造商:Motorola Inc 功能描述: |
| MPC603EFE133TN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PowerPC 603e RISC Microprocessor Family: PID6-603e (Stretch) Part Number Specifications |
| MPC603ERX100LN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PowerPC 603e RISC Microprocessor Family: PID6-603e (Stretch) Part Number Specifications |
| MPC603ERX100TN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PowerPC 603e RISC Microprocessor Family: PID6-603e (Stretch) Part Number Specifications |
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