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參數(shù)資料
| 型號： | MPC5603PEFMLQ |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-144 |
| 文件頁數(shù)： | 17/84頁 |
| 文件大小： | 1663K |
| 代理商： | MPC5603PEFMLQ |
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MPC5604P Microcontroller Data Sheet, Rev. 5
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
24
VDD_HV_AD0
4
SR 3.3 V / 5.0 V ADC0 supply and high
reference voltage with respect to
ground (VSS_HV)
VDD_HV_REG <
2.7 V
– 0.3
VDD_HV_REG + 0.3
V
VDD_HV_REG >
2.7 V
– 0.3
6.0
VSS_HV_AD0
SR ADC0 ground and low reference
voltage with respect to ground
(VSS_HV)
—–0.1
0.1
V
VDD_HV_AD1
SR 3.3 V / 5.0 V ADC0 supply and high
reference voltage with respect to
ground (VSS_HV)
VDD_HV_REG <
2.7 V
– 0.3
VDD_HV_REG + 0.3
V
VDD_HV_REG >
2.7 V
– 0.3
6.0
VSS_HV_AD1
SR ADC1 ground and low reference
voltage with respect to ground
(VSS_HV)
—–0.1
0.1
V
TVDD
SR Slope characteristics on all VDD during
power up5 with respect to ground
(VSS_HV)
—
0.5 V/s
3 V/S
—
VIN
SR Voltage on any pin with respect to
ground (VSS_HV_IOx) with respect to
ground (VSS_HV)
—–0.3
6.0
V
Relative to
VDD_HV_IOx
–0.3
VDD_HV_IOx +0.3
IINJPAD
SR Injected input current on any pin
during overload condition
—–10
10
mA
IINJSUM
SR Absolute sum of all injected input
currents during overload condition
—
–50
50
mA
IVDD_LV
SR Low voltage static current sink through
VDD_LV
——
155
mA
TSTG
SR Storage temperature
—
–55
150
°C
1 Functional operating conditions are given in the DC electrical characteristics. Absolute maximum ratings are stress
ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the listed maxima may affect
device reliability or cause permanent damage to the device.
2 Absolute maximum voltages are currently maximum burn-in voltages. Absolute maximum specifications for device
stress have not yet been determined.
3 The difference between each couple of voltage supplies must be less that 300 mV, |V
DD_HV_IOy – VDD_HV_IOx | <
300 mV.
4 The difference between ADC voltage supplies must be less that 300 mV, |V
DD_HV_ADC1 - VDD_HV_ADC0| < 300 mV.
5 Guaranteed by device validation
Table 5. Absolute maximum ratings1 (continued)
Symbol
Parameter
Conditions
Min
Max2
Unit
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