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| 型號： | MPC5602PEF0VLL4 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100 |
| 文件頁數(shù)： | 55/95頁 |
| 文件大?。?/td> | 1694K |
| 代理商： | MPC5602PEF0VLL4 |
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MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
59
Figure 15. Transient behavior during sampling phase
In particular two different transient periods can be distinguished:
A first and quick charge transfer from the internal capacitance CP1 and CP2 to the sampling capacitance CS occurs (CS
is supposed initially completely discharged): considering a worst case (since the time constant in reality would be
faster) in which CP2 is reported in parallel to CP1 (call CP = CP1 + CP2), the two capacitances CP and CS are in series,
and the time constant is
Eqn. 5
Equation 5 can again be simplified considering only CS as an additional worst condition. In reality, the transient is
faster, but the A/D converter circuitry has been designed to be robust also in the very worst case: the sampling time ts
is always much longer than the internal time constant:
Eqn. 6
The charge of CP1 and CP2 is redistributed also on CS, determining a new value of the voltage VA1 on the capacitance
according to Equation 7:
Eqn. 7
A second charge transfer involves also CF (that is typically bigger than the on-chip capacitance) through the resistance
RL: again considering the worst case in which CP2 and CS were in parallel to CP1 (since the time constant in reality
would be faster), the time constant is:
Eqn. 8
VA
VA1
VA2
t
ts
VCS
Voltage Transient on CS
V <0.5 LSB
1
2
1 < (RSW + RAD) CS << ts
2 = RL (CS + CP1 + CP2)
1 RSW RAD
+
=
CP CS
CP CS
+
---------------------
1 RSW RAD
+
CS ts
VA1 CS CP1 CP2
++
VA CP1 CP2
+
=
2 RL
CS CP1 CP2
++
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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