參數(shù)資料
型號： MPC5602PEF0VLH6R
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM, 0.50 MM PITCH, ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁數(shù)： 10/95頁
文件大?。?/td> 1694K
代理商： MPC5602PEF0VLH6R
MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
18
Trigger generation unit configurable in sequential mode or in triggered mode
Each trigger can be appropriately delayed to compensate the delay of external low pass filter
Double buffered global trigger unit allowing eTimer synchronization and/or ADC command generation
Double buffered ADC command list pointers to minimize ADC-trigger unit update
Double buffered ADC conversion command list with up to 24 ADC commands
Each trigger capable of generating consecutive commands
ADC conversion command allows to control ADC channel, single or synchronous sampling, independent result queue
selection
1.5.28
Nexus Development Interface (NDI)
The NDI (Nexus Development Interface) block provides real-time development support capabilities for the MPC5602P Power
Architecture based MCU in compliance with the IEEE-ISTO 5001-2003 standard. This development support is supplied for
MCUs without requiring external address and data pins for internal visibility. The NDI block is an integration of several
individual Nexus blocks that are selected to provide the development support interface for this device. The NDI block interfaces
to the host processor and internal busses to provide development support as per the IEEE-ISTO 5001-2003 Class 2+ standard.
The development support provided includes access to the MCU’s internal memory map and access to the processor’s internal
registers during run time.
The NDI provides the following features:
Configured via the IEEE 1149.1
All Nexus port pins operate at VDDIO (no dedicated power supply)
Nexus 2+ features supported
— Static debug
— Watchpoint messaging
— Ownership trace messaging
— Program trace messaging
— Real time read/write of any internally memory mapped resources through JTAG pins
— Overrun control, which selects whether to stall before Nexus overruns or keep executing and allow overwrite of
information
— Watchpoint triggering, watchpoint triggers program tracing
Auxiliary Output Port
— 4 MDO (Message Data Out) pins
— MCKO (Message Clock Out) pin
—2 MSEO (Message Start/End Out) pins
—EVTO (Event Out) pin
Auxiliary Input Port
—EVTI (Event In) pin
1.5.29
Cyclic redundancy check (CRC)
The CRC computing unit is dedicated to the computation of CRC off-loading the CPU. The CRC module features:
Support for CRC-16-CCITT (x25 protocol):
— x16 + x12 + x5 + 1
Support for CRC-32 (Ethernet protocol):
— x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1
Zero wait states for each write/read operations to the CRC_CFG and CRC_INP registers at the maximum frequency
相關(guān)PDF資料
PDF描述
MPC5601F0MLL6R 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
MPC5602F0MLH6R 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP64
MPC5602F0MLL4 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
MPC5601PEF0MLL6R 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
MPC5602F0VLL4R 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC5602PEF0VLL4R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5602P Microcontroller Data Sheet
MPC5602PEF0VLL6R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5602P Microcontroller Data Sheet
MPC5602S 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5606S Microcontroller Data Sheet
MPC5603B 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Qorivva MPC560xB/C/D Family
MPC5603BEMLL 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5604B/C Microcontroller Data Sheet
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*