參數(shù)資料
型號： MPC5561MZQ132R
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PBGA324
封裝： 23 X 23 MM, 1 MM PITCH, MS-034AAJ-1, TEPBGA-324
文件頁數(shù)： 48/56頁
文件大小： 1044K
代理商： MPC5561MZQ132R
MPC5561 Microcontroller Data Sheet, Rev. 2.0
Revision History for the MPC5561 Data Sheet
Freescale Semiconductor
52
Table 13 eQADC Conversion Specifications: Added (TA = TL – TH) to the table title.
Table 14 Flash Program and Erase Specifications:
Added (TA = TL – TH) to the table title.
Specs 7, 8, 9, and 10:
Changed typical values — 48 KB: from 340 to 345; 64 KB: from 400 to 415
Spec 8, 128KB block pre-program and erase time, Max. column value from 15,000 to 7,500.
Moved footnote 1 from the table title to directly after the ‘Typical’ in the column 5 header.
Footnote 2: Changed from: ‘Initial factory condition:
≤ 100 program/erase cycles, 25 oC, typical supply voltage,
80 MHz minimum system frequency.‘ to: ‘Initial factory condition:
≤ 100 program/erase cycles, 25 oC, using a
typical supply voltage measured at a minimum system frequency of 80 MHz.’
Table 15 Flash EEPROM Module Life:
Replaced (Full Temperature Range) with (TA = TL – TH) in the table title.
Spec 1b, Min. column value changed from 10,000 to 1,000.
Table 16 FLASH BIU Settings vs. Frequency of Operations:
Changed the Maximum Operating Frequency column entry from: Up to and including132 MHz to: Up to and
including134 MHz.
Added footnote 1 to the end of the table title, The footnote reads: ‘Illegal combinations exist. Use entries from the
same row in this table.’
Moved footnote 2:’ For maximum flash performance, set to 0b11’ to the ‘DPFEN’ column header.
Deleted the x-refs in the ‘DPFEN’ column for the rows.
Created a x-ref for footnote 2 and inserted in the ‘IPFEN’ column header.
Deleted the x-refs in the ‘IPFEN’ column for the rows.
Moved footnote 3:’ For maximum flash performance, set to 0b110’ to the ‘PFLIM’ column header.
Deleted the x-refs in the ‘PFLIM’ column for the rows.
Moved footnote 4:’ For maximum flash performance, set to 0b1’ to the ‘BFEN’ column header.
Deleted the x-refs in the ‘BFEN’ column for the rows.
Changed footnote 6 from: ‘Allows for 128 MHz system clock with 2% frequency modulation’ to: ‘Allows for 132
MHz system clock with 2% frequency modulation.’
Table 17 Pad AC Specifications and Table 18 Derated Pad AC Specifications:
Footnote 1, deleted ‘fSYS = 132 MHz.’
Footnote 2, changed from ‘tested’ to ‘(not tested).’
Footnote 3, changed from ‘Out delay. . .’ to ‘The output delay. . .’,
Changed from ‘Add a maximum of one system clock to the output delay to get the output delay with respect to
the system clock‘ to ‘To calculate the output delay with respect to the system clock, add a maximum of one system
clock to the output delay.’
Footnote 4: changed ‘Delay’ to ‘The output delay.’
Footnote 5: deleted ‘before qualification.’
Changed from ‘This parameter is supplied for reference and is not guaranteed by design and not tested’ to ‘This
parameter is supplied for reference and is guaranteed by design and tested.’
Table 19 Reset and Configuration Pin Timing: Footnote 1, deleted ‘fSYS = 132 MHz.’
Table 20 JTAG Pin AC Electrical Characteristics:
Footnote 1, deleted: ‘fSYS = 132 MHz.’ and ‘, and CL = 30 pF with DSC = 0b10, SRC = 0b11’
Footnote 1, changed ‘functional’ to ‘Nexus.’
Table 21 Nexus Debug Port Timing.
Changed Spec 12, TCK Low to TDO Data Valid: Changed ‘VDDE = 3.0 to 3.6 volts’ maximum value in column 4
from 9 to 10. Now reads ‘VDDE = 3.0–3.6 V’ with a max value of 10.
Footnote 5, changed from ‘to MCKO. The timing is . . .’ to: ‘ to ‘MCKO and is . . .’
Table 28. Table and Figure Changes Between Rev. 0.0 and 1.0 (continued)
Location
Description of Changes
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