參數(shù)資料
型號： MPC5553MZP132
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 132 MHz, MICROCONTROLLER, PBGA416
封裝： 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BGA-416
文件頁數(shù)： 2/68頁
文件大?。?/td> 1261K
代理商： MPC5553MZP132
MPC5553 Microcontroller Data Sheet, Rev. 3.0
Electrical Characteristics
Freescale Semiconductor
10
3.6
Voltage Regulator Controller (VRC) and Power-On Reset (POR)
Electrical Specifications
The following table lists the VRC and POR electrical specifications:
Table 6. VRC/POR Electrical Specifications
Spec
Characteristic
Symbol
Min.
Max.
Units
11.5 V (VDD) POR
1
1 On power up, assert RESET before V
POR15, VPOR33, and VPOR5 negate (internal POR). RESET must remain asserted until
the power supplies are within the operating conditions as specified in Table 9 DC Electrical Specifications. On power down,
assert RESET before any power supplies fall outside the operating conditions and until the internal POR asserts.
Negated (ramp up)
Asserted (ramp down)
VPOR15
1.1
1.35
V
23.3 V (VDDSYN) POR
Asserted (ramp up)
Negated (ramp up)
Asserted (ramp down)
Negated (ramp down)
VPOR33
0.0
2.0
0.0
0.30
2.85
0.30
V
3
RESET pin supply
(VDDEH6) POR
2 V
IL_S (Table 9, Spec15) is guaranteed to scale with VDDEH6 down to VPOR5.
Negated (ramp up)
Asserted (ramp down)
VPOR5
2.0
2.85
V
4
VRC33 voltage
Before VRC allows the pass
transistor to start turning on
VTRANS_START
1.0
2.0
V
5
When VRC allows the pass transistor
to completely turn on 3, 4
3 Supply full operating current for the 1.5 V supply when the 3.3 V supply reaches this range.
4 It is possible to reach the current limit during ramp up—do not treat this event as short circuit current.
VTRANS_ON
2.0
2.85
V
6
When the voltage is greater than the
voltage at which the VRC keeps the
1.5 V supply in regulation 5, 6
5 At peak current for device.
6 Requires compliance with Freescale’s recommended board requirements and transistor recommendations. Board signal
traces/routing from the VRCCTL package signal to the base of the external pass transistor and between the emitter of the pass
transistor to the VDD package signals must have a maximum of 100 nH inductance and minimal resistance
(less than 1
Ω). V
RCCTL must have a nominal 1 μF phase compensation capacitor to ground. VDD must have a 20 μF (nominal)
bulk capacitor (greater than 4
μF over all conditions, including lifetime). Place high-frequency bypass capacitors consisting of
eight 0.01
μF, two 0.1 μF, and one 1 μF capacitors around the package on the V
DD supply signals.
VVRC33REG
3.0
—
V
Current can be sourced
– 40o C11.0
—
mA
7
by VRCCTL at Tj:
25o CIVRCCTL
7
7 I
VRCCTL is measured at the following conditions: VDD = 1.35 V, VRC33 = 3.1 V, VVRCCTL = 2.2 V.
9.0
—
mA
150o C
7.5
—
mA
8
Voltage differential during power up such that:
VDD33 can lag VDDSYN or VDDEH6, before VDDSYN and VDDEH6 reach the
VPOR33 and VPOR5 minimums respectively.
VDD33_LAG
—1.0
V
9
Absolute value of slew rate on power supply pins
—
50
V/ms
10
Required gain at Tj:
IDD ÷ IVRCCTL (@ fsys = fMAX)
6, 7, 8, 9
8 Refer to Table 1 for the maximum operating frequency.
– 40o C
BETA10
40
—
25o C45
—
150o C55
500
—
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC551x
and
MPC5533
products
in
208
MAPBGA
packages;
MPC5534
and
MPC5553
products
in
208
and
496
MAPBGA
packages;
MPC5554,
MPC5565,
MPC5566
and
MPC5567
products
in
496
MAPBGA
packages
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