參數(shù)資料
型號： MPC5553MVR132
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 132 MHz, MICROCONTROLLER, PBGA416
封裝： 27 X 27 MM, 1 MM PITCH, LEAD FREE, PLASTIC, MS-034AAL-1, BGA-416
文件頁數(shù)： 8/68頁
文件大?。?/td> 1261K
代理商： MPC5553MVR132
MPC5553 Microcontroller Data Sheet, Rev. 3.0
Electrical Characteristics
Freescale Semiconductor
16
32
Slow and medium I/O weak pullup/down current 14
3.0–3.6 V
4.5–5.5 V
IACT_S
10
20
150
170
μA
33
I/O input leakage current 15
IINACT_D
–2.5
2.5
μA
34
DC injection current (per pin)
IIC
–2.0
2.0
mA
35
Analog input current, channel off 16
IINACT_A
–150
150
nA
35a Analog input current, shared analog / digital pins
(AN[12], AN[13], AN[14], AN[15])
IINACT_AD
–2.5
2.5
μA
36
VSS to VSSA differential voltage
17
VSS – VSSA
–100
100
mV
37
Analog reference low voltage
VRL
VSSA – 0.1
VSSA + 0.1
V
38
VRL differential voltage
VRL – VSSA
–100
100
mV
39
Analog reference high voltage
VRH
VDDA – 0.1
VDDA + 0.1
V
40
VREF differential voltage
VRH – VRL
4.5
5.25
V
41
VSSSYN to VSS differential voltage
VSSSYN – VSS
–50
50
mV
42
VRCVSS to VSS differential voltage
VRCVSS – VSS
–50
50
mV
43
VDDF to VDD differential voltage
VDDF – VDD
–100
100
mV
43a VRC33 to VDDSYN differential voltage
VRC33 – VDDSYN
–0.1
0.1 18
V
44
Analog input differential signal range (with common mode 2.5 V)
VIDIFF
–2.5
2.5
V
45
Operating temperature range, ambient (packaged)
TA = (TL to TH)TL
TH
οC
46
Slew rate on power-supply pins
—
50
V/ms
1 V
DDE2 and VDDE3 are limited to 2.25–3.6 V only if EBTS = 0; VDDE2 and VDDE3 have a range of 1.6–3.6 V if EBTS = 1.
2 | V
DDA0 – VDDA1 | must be < 0.1 V.
3 V
PP can drop to 3.0 V during read operations.
4 If standby operation is not required, connect V
STBY to ground.
5 Applies to CLKOUT, external bus pins, and Nexus pins.
6 Maximum average RMS DC current.
7 Figure 3 shows an illustration of the I
DD_STBY values interpolated for these temperature values.
8 Average current measured on Automotive benchmark.
9 Peak currents can be higher on specialized code.
10 High use current measured while running optimized SPE assembly code with all code and data 100% locked in cache
(0% miss rate) with all channels of the eMIOS and eTPU running autonomously, plus the eDMA transferring data continuously from
SRAM to SRAM. Higher currents are possible if an idle loop that crosses cache lines is run from cache. Design and write code to
avoid this condition.
11 Figure 3 shows an illustration of the I
DD_STBY values interpolated for these temperature values.
12 Power requirements for the V
DD33 supply depend on the frequency of operation, load of all I/O pins, and the voltages on the I/O
segments. Refer to Table 11 for values to calculate the power dissipation for a specific operation.
13 Power requirements for each I/O segment are dependent on the frequency of operation and load of the I/O pins on a particular I/O
segment, and the voltage of the I/O segment. Refer to Table 10 for values to calculate power dissipation for specific operation. The
total power consumption of an I/O segment is the sum of the individual power consumptions for each pin on the segment.
14 Absolute value of current, measured at V
IL and VIH.
Table 9. DC Electrical Specifications (TA = TL – TH) (continued)
Spec
Characteristic
Symbol
Min
Max.
Unit
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC551x
and
MPC5533
products
in
208
MAPBGA
packages;
MPC5534
and
MPC5553
products
in
208
and
496
MAPBGA
packages;
MPC5554,
MPC5565,
MPC5566
and
MPC5567
products
in
496
MAPBGA
packages
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