參數(shù)資料
型號： MPC5553MVR132
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 132 MHz, MICROCONTROLLER, PBGA416
封裝： 27 X 27 MM, 1 MM PITCH, LEAD FREE, PLASTIC, MS-034AAL-1, BGA-416
文件頁數(shù)： 58/68頁
文件大?。?/td> 1261K
代理商： MPC5553MVR132
Revision History for the MPC5553 Data Sheet
MPC5553 Microcontroller Data Sheet, Rev. 3.0
Freescale Semiconductor
61
From:
‘To avoid accidentally selecting the bypass clock because PLLCFG[0:1] and RSTCFG are not treated as ones
(1s) when POR negates, VDD33 must not lag VDDSYN and the RESET pin power (VDDEH6) when powering the
device by more than the VDD33 lag specification in Table 6. VDD33 individually can lag either VDDSYN or the
RESET power pin (VDDEH6) by more than the VDD33 lag specification. VDD33 can lag one of the VDDSYN or
VDDEH6 supplies, but cannot lag both by more than the VDD33 lag specification. This VDD33 lag specification only
applies during power up. VDD33 has no lead or lag requirements when powering down.’
To:
‘When powering the device, VDD33 must not lag VDDSYN and the RESET power pin (VDDEH6) by more than the
VDD33 lag specification listed in Table 6. This avoids accidentally selecting the bypass clock mode because the
internal versions of PLLCFG[0:1] and RSTCFG are not powered and therefore cannot read the default state
when POR negates. VDD33 can lag VDDSYN or the RESET power pin (VDDEH6), but cannot lag both by more than
the VDD33 lag specification. This VDD33 lag specification only applies during power up. VDD33 has no lead or lag
requirements when powering down.’
Added the following text directly before this section and after Table 8 Pin Status for Medium / Slow Pads During the
Power-on Sequence:
‘The values in Table 7 and Table 8 do not include the effect of the weak pull devices on the output pins during
power up.
Before exiting the internal POR state, the voltage on the pins goes to high-impedance until POR negates. When
the internal POR negates, the functional state of the signal during reset applies and the weak pull devices (up or
down) are enabled as defined in the device Reference Manual. If VDD is too low to correctly propagate the logic
signals, the weak-pull devices can pull the signals to VDDE and VDDEH.
To avoid this condition, minimize the ramp time of the VDD supply to a time period less than the time required to
enable the external circuitry connected to the device outputs.’
Table 32. Global and Text Changes Between Rev. 2.0 and 3.0 (continued)
Location
Description of Change
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC551x
and
MPC5533
products
in
208
MAPBGA
packages;
MPC5534
and
MPC5553
products
in
208
and
496
MAPBGA
packages;
MPC5554,
MPC5565,
MPC5566
and
MPC5567
products
in
496
MAPBGA
packages
相關(guān)PDF資料
PDF描述
MPC5553MVF132 32-BIT, FLASH, 132 MHz, MICROCONTROLLER, PBGA208
MPC5553MZQ112 32-BIT, FLASH, 112 MHz, MICROCONTROLLER, PBGA324
MPC5553MZP132 32-BIT, FLASH, 132 MHz, MICROCONTROLLER, PBGA416
MPC5553MVR112 32-BIT, FLASH, 112 MHz, MICROCONTROLLER, PBGA416
MPC5554MVR112R2 MICROCONTROLLER, PBGA416
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MPC5553MVZ112 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller
MPC5553MVZ112R2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller
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