參數(shù)資料
型號： MPC107APX066L0
廠商： MOTOROLA INC
元件分類： 外設及接口
英文描述： MULTIFUNCTION PERIPHERAL, PBGA503
封裝： 35 X 35 MM, PLASTIC, BGA-503
文件頁數(shù)： 6/44頁
文件大小： 553K
代理商： MPC107APX066L0
14
MPC107 Hardware Specifications (Rev B)
PRELIMINARYSUBJECT TO CHANGE WITHOUT NOTICE
Electrical and Thermal Characteristics
feedback loop (PC board runner) from SDRAM_SYNC_OUT to SDRAM_SYNC_IN in ns; 6.25 inches of
loop length (unloaded PC board runner) corresponds to approximately 1 ns of delay. tx0 is a xed delay
inherent in the design when the DLL is at tap point 0 and the DLL is contributing no delay; tx0 equals
approximately 3 ns. See Figure 5 for DLL locking ranges.
Figure 4 shows the PCI_SYNC_IN Input Clock Timing Diagram and Figure 5 the DLL Locking Range
Loop Delay vs. Frequency of Operation.
.
Figure 4. PCI_SYNC_IN Input Clock Timing Diagram
Figure 5. DLL Locking Range Loop Delay vs. Frequency of Operation
5a
5b
VM
VM = Midpoint Voltage (1.4V)
2
3
CVIL
CVIH
1
PCI_SYNC_IN
VM
DLL not guaranteed to lock
N = 1
DLL_EXTEND = 1
N = 1
DLL_EXTEND = 0
N = 2
DLL_EXTEND = 0
N = 3
DLL_EXTEND = 0
N = 2
DLL_EXTEND = 1
N = 3
DLL_EXTEND = 1
N > 3
DLL will lock
0 ns
Tloop Propagation Delay Time in Nanoseconds
T
cl
k
SDRAM_SYNC_OUT
P
eriod
and
Frequenc
y
10 ns
20 ns
30 ns
40 ns
100 MHz
10 ns
50 MHz
20 ns
33 MHz
30 ns
25 MHz
40 ns
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