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參數(shù)資料
| 型號(hào)： | MMFT3055VT3 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | 1700 mA, 60 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-261AA |
| 封裝： | CASE 318E-04, 4 PIN |
| 文件頁數(shù)： | 15/17頁 |
| 文件大?。?/td> | 193K |
| 代理商： | MMFT3055VT3 |
MMFT3055V
http://onsemi.com
634
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.079
2.0
0.15
3.8
0.248
6.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
0.091
2.3
0.091
2.3
mm
inches
SOT–223 POWER DISSIPATION
The power dissipation of the SOT–223 is a function of
the drain pad size. This can vary from the minimum pad
size for soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, R
θJA, the thermal resistance from
the device junction to ambient, and the operating
temperature, TA. Using the values provided on the data
sheet for the SOT–223 package, PD can be calculated as
follows:
PD =
TJ(max) – TA
R
θJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 943 milliwatts.
PD =
175
°C – 25°C
159
°C/W
= 943 milliwatts
The 159
°C/W for the SOT–223 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 943
milliwatts. There are other alternatives to achieving higher
power dissipation from the SOT–223 package. One is to
increase the area of the drain pad. By increasing the area of
the drain pad, the power dissipation can be increased.
Although one can almost double the power dissipation with
this method, one will be giving up area on the printed
circuit board which can defeat the purpose of using surface
mount technology. A graph of R
θJA versus drain pad area is
shown in Figure 17.
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