參數(shù)資料
型號(hào): MMDF2N02ER2
廠商: MOTOROLA INC
元件分類: JFETs
英文描述: 3.6 A, 25 V, 0.1 ohm, 2 CHANNEL, N-CHANNEL, Si, POWER, MOSFET
封裝: SO-8
文件頁(yè)數(shù): 1/10頁(yè)
文件大?。?/td> 276K
代理商: MMDF2N02ER2
MMDF2N02E
DUAL TMOS MOSFET
3.6 AMPERES
25 VOLTS
RDS(on) = 0.1 OHM
Source–1
1
2
3
4
8
7
6
5
Top View
Gate–1
Source–2
Gate–2
Drain–1
Drain–2
D
S
G
CASE 751–05, Style 11
SO–8
1
Motorola TMOS Power MOSFET Transistor Device Data
Designer's Data Sheet
Medium Power Surface Mount Products
TMOS Dual N-Channel
Field Effect Transistors
MiniMOS
devices are an advanced series of power MOSFETs
which utilize Motorola’s TMOS process. These miniature surface
mount MOSFETs feature ultra low RDS(on) and true logic level
performance. They are capable of withstanding high energy in the
avalanche and commutation modes and the drain–to–source diode
has a low reverse recovery time. MiniMOS devices are designed
for use in low voltage, high speed switching applications where
power efficiency is important. Typical applications are dc–dc
converters, and power management in portable and battery
powered products such as computers, printers, cellular and
cordless phones. They can also be used for low voltage motor
controls in mass storage products such as disk drives and tape
drives. The avalanche energy is specified to eliminate the
guesswork in designs where inductive loads are switched and offer
additional safety margin against unexpected voltage transients.
Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life
Logic Level Gate Drive — Can Be Driven by Logic ICs
Miniature SO–8 Surface Mount Package — Saves Board Space
Diode Is Characterized for Use In Bridge Circuits
IDSS Specified at Elevated Temperatures
Avalanche Energy Specified
Mounting Information for SO–8 Package Provided
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
VDSS
25
Vdc
Gate–to–Source Voltage — Continuous
VGS
± 20
Vdc
Drain Current — Continuous @ TA = 25°C
Drain Current — Continuous @ TA = 100°C
Drain Current — Single Pulse (tp ≤ 10 s)
ID
IDM
3.6
2.5
18
Adc
Apk
Total Power Dissipation @ TA = 25°C (1)
PD
2.0
W
Operating and Storage Temperature Range
TJ, Tstg
– 55 to 150
°C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 10 Vdc, Peak IL = 9.0 Apk, L = 6.0 mH, RG = 25 )
EAS
245
mJ
Thermal Resistance, Junction to Ambient (1)
R
θJA
62.5
°C/W
Maximum Lead Temperature for Soldering Purposes, 0.0625
″ from case for 10 seconds
TL
260
°C
DEVICE MARKING
F2N02
(1) Mounted on 2” square FR4 board (1” sq. 2 oz. Cu 0.06” thick single sided) with one die operating, 10 sec. max.
ORDERING INFORMATION
Device
Reel Size
Tape Width
Quantity
MMDF2N02ER2
13
12 mm embossed tape
2500
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s, E–FET and MiniMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Order this document
by MMDF2N02E/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1996
REV 5
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