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參數(shù)資料
| 型號(hào)： | MM74HCT32SJX |
| 廠商： | Fairchild Semiconductor |
| 文件頁(yè)數(shù)： | 7/9頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC GATE OR QUAD 2-INPUT 14-SOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | 74HCT |
| 邏輯類型： | 或門(mén) |
| 電路數(shù)： | 4 |
| 輸入數(shù)： | 2 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電流 - 靜態(tài)（最大值）： | 2µA |
| 輸出電流高，低： | 4.8mA，4.8mA |
| 邏輯電平 - 低： | 0.8V |
| 邏輯電平 - 高： | 2V |
| 額定電壓和最大 CL 時(shí)的最大傳播延遲： | 20ns @ 5V，15pF |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 封裝/外殼： | 14-SOIC（0.209"，5.30mm 寬） |
| 包裝： | 帶卷 (TR) |
1987 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HCT32 Rev. 1.3.0
7
MM74HCT32
—
Quad
2-Input
OR
Gate
Physical Dimensions (Continued)
Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specications do not expand the terms of Fairchild’s worldwide terms and conditions,
specically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS
F. DRAWING FILE NAME: MTC14REV6
R0.09 min
12.00°
TOP & BOTTOM
0.43 TYP
1.00
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 1982
R0.09min
E. LANDPATTERN STANDARD: SOP65P640X110-14M
0.65
6.10
1.65
0.45
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS
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| MM74HCT34 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Non-Inverter |
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| MM74HCT373J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
| MM74HCT373J/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
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