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參數(shù)資料
| 型號(hào)： | MM74HCT32SJX |
| 廠商： | Fairchild Semiconductor |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC GATE OR QUAD 2-INPUT 14-SOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | 74HCT |
| 邏輯類(lèi)型： | 或門(mén) |
| 電路數(shù)： | 4 |
| 輸入數(shù)： | 2 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電流 - 靜態(tài)（最大值）： | 2µA |
| 輸出電流高，低： | 4.8mA，4.8mA |
| 邏輯電平 - 低： | 0.8V |
| 邏輯電平 - 高： | 2V |
| 額定電壓和最大 CL 時(shí)的最大傳播延遲： | 20ns @ 5V，15pF |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 封裝/外殼： | 14-SOIC（0.209"，5.30mm 寬） |
| 包裝： | 帶卷 (TR) |
1987 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HCT32 Rev. 1.3.0
5
MM74HCT32
—
Quad
2-Input
OR
Gate
Physical Dimensions
Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specications do not expand the terms of Fairchild’s worldwide terms and conditions,
specically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
LAND PATTERN RECOMMENDATION
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD:
SOIC127P600X145-14M
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
PIN ONE
INDICATOR
8°
0°
SEATING PLANE
DETAIL A
SCALE: 20:1
GAGE PLANE
0.25
X45°
1
0.10
C
B
C
A
7
M
14
B
A
8
SEE DETAIL A
5.60
0.65
1.70
1.27
8.75
8.50
7.62
6.00
4.00
3.80
(0.33)
1.27
0.51
0.35
1.75 MAX
1.50
1.25
0.25
0.10
0.25
0.19
(1.04)
0.90
0.50
0.36
R0.10
0.50
0.25
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