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參數(shù)資料
型號: MM74HC02SJ
廠商: Fairchild Semiconductor
文件頁數(shù): 3/9頁
文件大?。?/td> 0K
描述: IC GATE NOR QUAD 2-INP 14-SOP
標(biāo)準(zhǔn)包裝: 47
系列: 74HC
邏輯類型: 或非門
電路數(shù): 4
輸入數(shù): 2
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 2µA
輸出電流高,低: 5.2mA,5.2mA
邏輯電平 - 低: 0.5 V ~ 1.8 V
邏輯電平 - 高: 1.5 V ~ 4.2 V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 15ns @ 6V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 14-SOIC
封裝/外殼: 14-SOIC(0.209",5.30mm 寬)
包裝: 管件
1983 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HC02 Rev. 1.3.0
3
MM74HC02
Quad
2-Input
NOR
Gate
DC Electrical Characteristics(3)
Note:
3. For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V
values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V
respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at
the higher voltage and so the 6.0V values should be used.
Symbol
Parameter
VCC (V)
Conditions
TA = 25°C
TA = –40°C
to 85°C
TA = –55°C
to 125°C
Units
Typ.
Guaranteed Limits
VIH
Minimum HIGH Level
Input Voltage
2.0
1.5
V
4.5
3.15
6.0
4.2
VIL
Maximum LOW Level
Input Voltage
2.0
0.5
V
4.5
1.35
6.0
1.8
VOH
Minimum HIGH Level
Output Voltage
2.0
VIN = VIL,
|IOUT| ≤ 20A
2.0
1.9
V
4.5
4.4
6.0
5.9
4.5
VIN = VIL,
|IOUT| ≤ 4.0mA
4.2
3.98
3.84
3.7
6.0
VIN = VIL,
|IOUT| ≤ 5.2mA
5.7
5.48
5.34
5.2
VOL
Maximum LOW Level
Output Voltage
2.0
VIN = VIH or VIL,
|IOUT| ≤ 20A
0
0.1
V
4.5
0
0.1
6.0
0
0.1
4.5
VIN = VIH or VIL,
|IOUT| ≤ 4.0mA
0.2
0.26
0.33
0.4
6.0
VIN = VIH or VIL,
|IOUT| ≤ 5.2mA
0.2
0.26
0.33
0.4
IIN
Maximum Input
Current
6.0
VIN = VCC or GND
±0.1
±1.0
A
ICC
Maximum Quiescent
Supply Current
6.0
VIN = VCC or GND,
IOUT = 0A
2.0
20
40
A
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