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參數資料
| 型號： | ML9208A-XXGA |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 5 X 7 DOT CHARACTER FLUORESCENT DSPL CTRL, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁數： | 9/35頁 |
| 文件大?。?/td> | 632K |
| 代理商： | ML9208A-XXGA |
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FEDL9208A-02
ML9208A-xx
17/35
2. CGRAM data write
(Specifies the addresses of CGRAM and writes character pattern data.)
CGRAM (Character Generator RAM) has a 3-bit address to store 5
× 7 dot matrix character patterns.
A character pattern stored in CGRAM can be displayed by specifying the character code (address) by
DCRAM.
The address of CGRAM is assigned to 00H to 07H. (All the other addresses are the CGROM addresses.)
(The CGRAM can store 8 types of character patterns.)
[Command format]
C0 C5 C10C15C20C25C30
*
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
LSB
MSB
: specifies 1st column data
(rewritten into CGRAM address 00H)
C1 C6 C11C16C21C26C31
*
B0 B1 B2 B3 B4 B5 B6 B7
3rd byte
(3rd)
LSB
MSB
: specifies 2nd column data
(rewritten into CGRAM address 00H)
X0 X1 X2 *
0
1
0
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
LSB
MSB
: selects CGRAM data write mode and specifies
CGRAM address.
(Ex: specifies CGRAM address 00H)
C2 C7 C12C17C22C27C32
*
B0 B1 B2 B3 B4 B5 B6 B7
4th byte
(4th)
LSB
MSB
: specifies 3rd column data
(rewritten into CGRAM address 00H)
C3 C8 C13C18C23C28C33
*
B0 B1 B2 B3 B4 B5 B6 B7
5th byte
(5th)
LSB
MSB
: specifies 4th column data
(rewritten into CGRAM address 00H)
C4 C9 C14C19C24C29C34
*
B0 B1 B2 B3 B4 B5 B6 B7
6th byte
(6th)
LSB
MSB
: specifies 5th column data
(rewritten into CGRAM address 00H)
To specify character pattern data continuously to the next address, specify only character pattern data as
follows.
The addresses of CGRAM are automatically incremented.
Specification of an address is therefore
unnecessary.
The 2nd to 6th byte (character pattern data) are regarded as one data item, so 250ns is sufficient for tDOFF time
between bytes.
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