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參數(shù)資料
| 型號(hào)： | ML9042-XXCVWA |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233 |
| 封裝： | DIE-233 |
| 文件頁(yè)數(shù)： | 20/59頁(yè) |
| 文件大?。?/td> | 589K |
| 代理商： | ML9042-XXCVWA |
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FEDL9042-01
OKI Semiconductor
ML9042-xx
26/58
Built-in Reset Circuit
The ML9042 is automatically initialized when the power is turned on.
During initialization, the Busy Flag (BF) is “1” and the ML9042 does not accept any instruction from the CPU
(other than the Read BF instruction).
The Busy Flag is “1” for about 15 ms after the VDD becomes 2.7 V or higher.
During this initialization, the ML9042 performs the following instructions:
1)
Display clearing
2)
CPU interface data length = 8 bits
(DL = “1”)
3)
1-line LCD display
(N = “0”)
4)
ADC counting = Increment
(I/D = “1”)
5)
Display shifting = None
(S = “0”)
6)
Display = Off
(D = “0”)
7)
Cursor = Off
(C = “0”)
8)
Blinking = Off
(B = “0”)
9)
Arbitrator = Displayed in the lower line
(AS = “0”)
10) Arbitrator = Not displayed
(ABE = “0”)
11) Segment shift direction = SEG1 → SEG100
(SSR = “0”)
12) Common shift direction = COM1 → COM17
(CSR = “0”)
To use the built-in reset circuit, the power supply conditions shown below should be satisfied. Otherwise, the
built-in reset circuit may not work properly. In such a case, initialize the ML9042 with the instructions from the
CPU. The use of a battery always requires such initialization from the CPU. (See “Initial Setting of Instructions”)
tON
2.7 V
0.2 V
tOFF
0.1 ms
≤ t
ON ≤100 ms
1 ms
≤ t
OFF
Figure 1 Power-on and Power-off Waveform
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML9044 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A-XXACVWA | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A-XXBCVWA | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
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