參數(shù)資料
型號: ML9042-01CVWA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 顯示控制器
英文描述: 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
封裝: DIE-233
文件頁數(shù): 27/58頁
文件大?。?/td> 558K
代理商: ML9042-01CVWA
FEDL9042-01
OKI Semiconductor
ML9042-xx
33/58
3) Entry Mode Setting
RS1
1
RS0
0
R/
W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
1
DB1
I/D
DB0
S
Instruction code:
(1)
When the I/D is set, the cursor or blink shifts to the right by 1 character position (ID= “1”; increment) or to
the left by 1 character position (I/D= “0”; decrement) after an 8-bit character code is written to or read
from the DDRAM. At the same time, the address counter (ADC) is also incremented by 1 (when I/D =
“1”; increment) or decremented by 1 (when I/D = “0”; decrement). After a character pattern is written to
or read from the CGRAM, the address counter (ADC) is incremented by 1 (when I/D = “1”; increment) or
decremented by 1 (when I/D = “0”; decrement).
Also after data is written to or read from the ABRAM, the address counter (ADC) is incremented by 1
(when I/D = “1”; increment) or decremented by 1 (when I/D = “0”; decrement).
(2)
When S = “1”, the cursor or blink stops and the entire display shifts to the left (I/D = “1”) or to the right
(I/D = “0”) by 1 character position after a character code is written to the DDRAM.
In the case of S = “1”, when a character code is read from the DDRAM, when a character pattern is
written to or read from the CGRAM or when data is written to or read from the ABRAM, normal
read/write is carried out without shifting of the entire display. (The entire display does not shift, but the
cursor or blink shifts to the right (I/D = “1”) or to the left (I/D = “0”) by 1 character position.)
When S = “0”, the display does not shift, but normal write/read is performed.
Note:
The execution time of this instruction is 37
s (maximum) at an oscillation frequency of
270 kHz.
4) Display ON/OFF Control
RS1
1
RS0
0
R/
W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
1
DB2
D
DB1
C
DB0
B
Instruction code:
(1)
The “D” bit (DB2) of this instruction determines whether or not to display character patterns on the LCD.
When the “D” bit is “1”, character patterns are displayed on the LCD.
When the “D” bit is “0”, character patterns are not displayed on the LCD and the cursor/blinking also
disappear.
Note:
Unlike the Display Clear instruction, this instruction does not change the character code in the
DDRAM .
(2)
When the “C” bit (DB1) is “0”, the cursor turns off. When both the “C” and “D” bits are “1”, the cursor
turns on.
(3)
When the “B” bit (DB0) is “0”, blinking is canceled. When both the “B” and “D” bits are “1”, blinking is
performed.
In the Blinking mode, all dots including those of the cursor, the character pattern and the cursor are
alternately displayed.
Note:
The execution time of this instruction is 37
s (maximum) at an oscillation frequency of
270 kHz.
相關(guān)PDF資料
PDF描述
ML9042-01DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-11DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-21CVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-01CVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-11DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
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