參數(shù)資料
型號(hào): ML9042-01CVWA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 顯示控制器
英文描述: 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
封裝: DIE-233
文件頁(yè)數(shù): 20/58頁(yè)
文件大?。?/td> 558K
代理商: ML9042-01CVWA
FEDL9042-01
OKI Semiconductor
ML9042-xx
27/58
I/F with CPU
Parallel interface mode
The ML9042 can transfer either 8 bits once or 4 bits twice on the data bus for interfacing with any 8-bit or 4-bit
microcontroller (CPU).
1) 8-bit interface data length
The ML9042 uses all of the 8 data bus lines DB0(SO) to DB7 at a time to transfer data to and from the CPU.
2) 4-bit interface data length
The ML9042 uses only the higher-order 4 data bus lines DB4 to DB7 twice to transfer 8-bit data to and from the
CPU.
The ML9042 first transfers the higher-order 4 bits of 8-bit data (DB4 to DB7 in the case of 8-bit interface data
length) and then the lower-order 4 bits of the data (DB0(SO) to DB3 in the case of 8-bit interface data length).
The lower-order 4 bits of data should always be transferred even when only the transfer of the higher-order 4
bits of data is required. (Example: Reading the Busy Flag)
Two transfers of 4 bits of data complete the transfer of a set of 8-bit data. Therefore, when only one access is
made, the following data transfer cannot be completed properly.
相關(guān)PDF資料
PDF描述
ML9042-01DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-11DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-21CVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-01CVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-11DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
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