- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45333 > ML675001TC (OKI ELECTRIC INDUSTRY CO LTD) 32-BIT, 60 MHz, RISC MICROCONTROLLER, PQFP144 PDF資料下載
參數(shù)資料
| 型號： | ML675001TC |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 60 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 650K |
| 代理商： | ML675001TC |
Oki Semiconductor 13
ML675001/ML67Q5002/ML67Q5003
April 2004, Rev 2.0
XIOCS_N[3]
O
I/O chip select 3.
–
Negative
XOE_N
O
Output enable/ Read enable.
–
Negative
XWE_N
O
Write enable.
–
Negative
XBS_N[1:0]
O
Byte select: XBS_N[1] is for MSB, XBS_N[0] is for LSB.
–
Negative
XBWE_N[0]
O
LSB Write enable.
–
Negative
XBWE_N[1]
O
MSB Write enable.
–
Negative
XWR
O
Data transfer direction for external bus, used when connecting to Motorola I/O devices. This
represent the secondary function of pin PIOC[7].
L = read, H = write. Available for I/O bank 0/1
Secondary
–
XWAIT
I
External I/O bank 0/1/2/3 WAIT signal.
This pin permits access to devices slower than register settings.
Secondary
Positive
External Bus Interface (EDO-DRAM and SDRAM)
XRAS_N
O
Row address strobe. Used for both EDO DRAM and SDRAM.
Secondary
Negative
XCAS_N
O
Column address strobe signal (SDRAM).
Secondary
Negative
XSDCLK
O
SDRAM clock (same frequency as internal system clock).
Secondary
–
XSDCKE
O
Clock enable (SDRAM).
Secondary
–
XSDCS_N
O
Chip select (SDRAM).
Secondary
Negative
XDQM[1]/
XCAS_N[1]
O
Connected to SDRAM: DQM (MSB).
Connected to EDO-DRAM: column address strobe signal (MSB).
Secondary
Positive
Negative
XDQM[0]/
XCAS_N[0]
O
Connected to SDRAM: DQM (LSB).
Connected to EDO-DRAM: column address strobe signal (LSB).
Secondary
Positive
Negative
DMA Interface
DREQ[0]
I
Channel 0 DMA request signal. Used then DMA controller is congured for DREQ type.
Secondary
Positive
DREQCLR[0]
O
Channel 0 DREQ signal clear request. The DMA device responds to the assertion of this sig-
nal by negating DREQ.
Secondary
Positive
TCOUT[0]
O
This signal is driven by the MCU and indicates to the Channel 0 DMA device that the last
transfer of the DMA operation has started.
Secondary
Positive
DREQ[1]
I
Channel 1 DMA request signal. Used then DMA controller is congured for DREQ type.
Secondary
Positive
DREQCLR[1]
O
Channel 1 DREQ signal clear request. The DMA device responds to the assertion of this sig-
nal by negating DREQ.
Secondary
Positive
TCOUT[1]
O
This signal is driven by the MCU and indicates to the Channel 1 DMA device that the last
transfer of the DMA operation has started.
Secondary
Positive
UART Interface
SIN
I
UART receive signal.
Secondary
Positive
SOUT
O
UART transmit signal.
Secondary
Positive
CTS
I
Clear To Send.
Indicates that modem or data set is ready to transfer data. Bit 4 in the modem status reg-
ister reects this input.
Secondary
Negative
DSR
I
Data Set Ready.
Indicates that modem or data set is ready to establish a communications link with UART.
Bit 5 in the modem status register reects this input.
Secondary
Negative
DCD
I
Data Carrier Detect.
Indicates that modem or data set has detected data carrier signal.Bit 7 in the modem status
register reects this input.
Secondary
Negative
DTR
O
Data Terminal Ready.
Indicates that UART is ready to establish a communications link with the modem or data set.
Bit 0 in the modem control register controls this output.
Secondary
Negative
RTSO
Request To Send.
indicates that UART is ready to transfer data to modem or data set. Bit 1 in the modem con-
trol register controls this output.
Secondary
Negative
Pin Descriptions (Continued)
Pin Name
I/O
Description
Primary/
Secondary
Logic
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ML67Q5002TC | 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP144 |
| ML67Q5002LA | 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PBGA144 |
| ML67Q5003LA | 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PBGA144 |
| ML9040-BXXGA | 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80 |
| ML9040A-A01WA | 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC81 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML675050LAZE3A | 功能描述:ARM微控制器 - MCU 32-BIT ARM7TDMI RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| ML675050TCZE3A | 功能描述:ARM微控制器 - MCU 32-BIT ARM7TDMI RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| ML67600166 | 功能描述:電位計 100mm Magnetic Lnr. RoHS:否 制造商:Bourns 產(chǎn)品:Musical Syst Potentiometer 安裝風(fēng)格:Panel 錐度:Audio, Linear 轉(zhuǎn)數(shù): 電阻:500 kOhms 元件類型:Carbon 軸類型:Round / Plain 端接類型:Solder Lug 電壓額定值:200 V 功率額定值:0.2 W 容差:20 % |
| ML67600176 | 功能描述:精度電位計 300mm Magnetic Linear RoHS:否 制造商:Bourns 產(chǎn)品:Precision Potentiometer 安裝風(fēng)格:Panel 線性: 錐度: 轉(zhuǎn)數(shù):3 元件類型:Wirewound 軸類型:Slotted 電阻:2 kOhms 端接類型:Solder Lug 電壓額定值: 容差:5 % |
| ML67Q4002 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:32-bit ARM-Based General-Purpose Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。