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ML674001 Series/ML675001 Series User’s Manual
Chapter 3
Address Mapping
3-3
3.2.2 ML675001 series address map
Note:
Do not carry out access to the reserved regions in the address map. Operation is not guaranteed when
accessing.
Bank
Address
FFFF_FFFF
FC00_0000
External I/O 3
F800_0000
External I/O 2
F400_0000
External I/O 1
F000_0000
External I/O 0
External SRAM
E800_0000
(mirror of bank 26)
External ROM
D000_0000
E000_0000
(mirror of bank 25)
External DRAM
CC00_0000
D800_0000
(mirror of bank 24)
C800_0000
D000_0000
C800_0000
C000_0000
B800_2020
B800_2000
SIO control register
B800_0000
B800_1020
(reserved)
B800_1000
System timer control register
B000_0000
B800_0020
(reserved)
B800_0000
System control register
A800_0000
B800_0000
A000_0000
B7F0_0000
Auto reload timer control register
B7E0_0000
WDT control register
9800_0000
B7D0_0000
PWM control register
B7B0_1000
Synchronous SIO control register
9000_0000
B7B0_0000
UART control register
B7A0_1000
Port control register
8800_0000
B780_1000
(reserved)
B780_0000
I2C control register
8000_0000
B710_0000
(reserved)
7C00_0000
(reserved)
B700_0000
Chip configuration control register
7830_0000
AHB standard IO
7800_0000
uPlat Core I/O
B600_2000
B600_1000
Analog-to-digital converter control register
7000_0000
6800_0000
B000_0000
6000_0000
8000_0000
5800_0000
Internal RAM
7C00_0000
5000_0000
7BF0_0000
Expansion interrupt control register
7BE0_0000
DMA controller control register
4800_0000
7840_0000
(reserved)
7830_0000
External I/O access control register(bank31)
4000_0000
7820_0000
Cache memory control register
7818_0000
DRAM controller control register
3800_0000
7810_0000
External memory and I/O access control register(bank30)
7800_0030
(reserved)
3000_0000
7800_0000
Interrupt control register
2800_0000
2000_0000
1800_0000
1000_0000
5000_0000
0800_0000
(reserved)
Remappable ROM/RAM
4800_1000
0000_0000
(AHB / Ext.)
4800_0000
BootROM(4KB)
(reserved)
External ROM/MCP Flash ROM (refer to table 3-
1)
MCP Flash ROM/External ROM (refer to table 3-
1)
(reserved)
External SRAM
External DRAM
Core APB IO
Standard APB IO
External ROM
(reserved)
0
1
2
3
4
5
6
7
9
8
10
11
27
26
25
20
21
22
23
31
30
28
29
(reserved)
24
16
17
18
19
12
13
14
15
(reserved)
Ex
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rn
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A
P
A
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