
ML66525 Family User’s Manual
Chapter 17 USB Control Function
17 - 20
17.4 Registers for USB Control Functions
[Note]
1. When the registers for USB control given below are controlled by the CPU, the UDCKEN bit
of the P5IO register must be set to “0” in advance (see page 13-3).
2. When the registers for USB control given below are controlled by the CPU, bit 7 of the
INTSTAT register must be set to “1” in advance (see page 19-7).
Table 17-1 shows a list of the special function registers (SFRs) for the USB control functions.
Table 17-1 List of SFRs for the USB Control Functions (1/2)
Category
Address
[H]
Register name
Symbol
(byte)
Symbol
(word)
R/W
8/16
Operation
Initial
value [H]
Reference
page
1A70
EP0 transmit FIFO
EP0TXFIFO
—
W
8
00
17-22
1A78
EP0 receive FIFO
EP0RXFIFO
—
R
8
Undefined
17-22
1A79
EP1 transmit/receive FIFO
EP1FIFO
—
R/W
8
Undefined
17-23
1A7A
EP2 transmit/receive FIFO
EP2FIFO
—
R/W
8
Undefined
17-23
1A7B
EP3 transmit/receive FIFO
EP3FIFO
—
R/W
8
Undefined
17-24
1A7C
EP4 transmit/receive FIFO
EP4FIFO
—
R/W
8
Undefined
17-24
FIFO
1A7D
EP5 transmit/receive FIFO
EP5FIFO
—
R/W
8
Undefined
17-25
1A00
bRequest type setup register
bmRequestType
—
R
8
00
17-26
1A01
bRequest setup register
bRequest
—
R
8
00
17-26
1A02
wValueLSB setup register
wValueLSB
—
R
8
00
17-27
1A03
wValueMSB setup register
wValueMSB
—
R
8
00
17-27
1A04
wIndexLSB setup register
wIndexLSB
—
R
8
00
17-28
1A05
wIndexMSB setup register
wIndexMSB
—
R
8
00
17-28
1A06
wLengthLSB setup register
wLengthLSB
—
R
8
00
17-29
1A07
wLengthMSB setup register
wLengthMSB
—
R
8
00
17-29
1A20
Device address register
DVCADR
—
R/W
8
00
17-32
1A21
Interrupt status register 1
INTSTAT1
—
R
8
00
17-33
1A22
Interrupt status register 2
INTSTAT2
—
R/W
8
00
17-34
1A24
Interrupt enable register 1
INTENBL1
—
R/W
8
01
17-35
1A25
Interrupt enable register 2
INTENBL2
—
R/W
8
00
17-36
1A2D
Frame number LSB register
FRAMELSB
—
R
8
00
17-37
1A2E
Frame number MSB register
FRAMEMSB
—
R
8
00
17-37
1A2F
System control register
SYSCON
—
R/W
8
00
17-38
Common
1A30
Polarity selection register
POLSEL
—
R/W
8
00
17-39
1A10
DMA0 control register
DMA0CON
—
R/W
8
00
17-30
1A11
DMA0 interval register
DMA0INTVL
—
R/W
8
00
17-31
1A12
DMA1 control register
DMA1CON
—
R/W
8
00
17-30
DMA
1A13
DMA1 interval register
DMA1INTVL
—
R/W
8
00
17-31