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參數(shù)資料
| 型號(hào)： | ML6401CS-1 |
| 英文描述： | 8-Bit 20 MSPS A/D Converter |
| 中文描述： | 8位20 MSPS的A / D轉(zhuǎn)換 |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大?。?/td> | 554K |
| 代理商： | ML6401CS-1 |
7
ML6401
Note:
Circuit in dashed lines is an optional 1175 input
network which can be replaced with circuits in
Figure 1 or 2.
CLK
VDD
O
D7
D6
D5
D4
D3
D2
D1
D0
GND
O
OE
VDD
D
VDD
A
VDD
A
VRTS
VRT
VDD
A
VIN+
GND
A
GND
A
VRBS
VRB
GND
D
12
11
10
9
8
7
6
5
4
3
2
1
13
14
15
16
17
18
19
20
21
22
23
24
1175 PINOUT
+5V
HC04
CLOCK IN
CLK
C10
0.1
μ
F
C4
0.1
μ
F
C3
47
μ
F
C1
470
μ
F
C6
47
μ
F
C9
47
μ
F
+
+
+
+
R10
75
C11
0.1
μ
F
C12
0.1
μ
F
C7
47
μ
F
C2
10
μ
F
C13
10pF
C8
0.1
μ
F
+12V
R8
100
R9
5k
R4
1k
R1
120
R2
180
R7*
5k
POT
R5
2k
R3
500
C5
0.1
μ
F
Q3
Q2
Q1
V
IN
–12V
*POT R7 WILL HAVE TO BE ADJUSTED
LSB
MSB
+
+
3.
CXD1175
— Connect VRBS to VRB and leave VRTS
open while driving VRT with an external voltage. This
allows similar functionality to #2 preceding, but the
bias voltage (code 0) will move when the full scale
range is changed.
ML6401
— Open pin 16, drive pin 17 externally, and
connect pin 22 to pin 23. The full scale range will be
2
×
pin 17 volts, and the bias (code 128) will occur at
1.5 volts (internally generated from bandgap). The full
scale range of the A/D must be kept below 4 volts, but
the part is only specified for full scale range of 2 volts.
Figure 3. Replacement for 1175.
4.
CXD1175
— Connect VRTS to VRT and leave VRBS
open while driving VRB with an external voltage. This
allows similar functionality to #2 preceding, but the
bias voltage (code 0) will move when the full scale
range is changed.
ML6401
— Connect pin 16 to pin 17, open pin 22 and
drive pin 23 externally. The full scale range will be 2
volts (internally generated from bandgap), and the bias
(code 128) will occur at pin 23
±
2% volts.
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