參數(shù)資料
型號： ML610Q411-XXXWA
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, UUC95
封裝： 2.83 MM X 2.63 MM, 0.35 MM HEIGHT, 0.80 MM PITCH, DIE-95
文件頁數(shù)： 106/152頁
文件大?。?/td> 1641K
代理商： ML610Q411-XXXWA
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Chapter 4
MCU Control Function
4 – 12
4.3.3
STOP Mode
The STOP mode is the state where low-speed oscillation and high-speed oscillation stop and the CPU and peripheral
circuits stop the operation.
When the stop code acceptor is enabled by writing “5nH”(n: an arbitrary value) and “0AnH”(n: an arbitrary value) to
the stop code acceptor (STPACP) sequentially and the STP bit of the standby control register (SBYCON) is set to “1”,
the STOP mode is entered. When the STOP mode is set, the stop code acceptor is disabled.
When a NMI interrupt request or an interrupt-enabled (the interrupt enable flag is “1”) P00 to P003 interrupt request is
issued, the STP bit is set to “0”, the STOP mode is released, and the mode is returned to the program run mode.
4.3.3.1
STOP Mode When CPU Operates with Low-Speed Clock
When the stop code acceptor is in the enabled state and the STP bit of SBYCON is set to “1”, the STOP mode is
entered, stopping low-speed oscillation and high-speed oscillation.
When the NMI interrupt request or the interrupt-enabled (the interrupt enable flag is “1”) P00 to P03 interrupt request
is issued, the STP bit is set to “0” and low-speed oscillation restarts.
If the high-speed clock was oscillating before the
STOP mode is entered, the high-speed oscillation restarts.
When the high-speed clock was not oscillating before the
STOP mode is entered, high-speed oscillation does not start.
When an interrupt request occurs, the STOP mode is released after the elapse of the low-speed oscillation start time
(TXTL) and the low-speed clock (LSCLK) oscillation settling time (8192-pulse count), the mode is returned to the
program mode, and the low-speed clock (LSCLK) restarts supply to the peripheral circuits.
If the high-speed clock
already started oscillation at this time, the high-speed clocks (OSCLK and HSCLK) also restart supply to the peripheral
circuits.
For the low-speed oscillation start time (TXTL), see the “Electrical Characteristics” Section in Appendix C.
Figure 4-3 shows the operation waveforms in STOP mode when CPU operates with the low-speed clock.
Figure 4-3
Operation Waveforms in STOP Mode When CPU Operates with Low-Speed Clock
Low-speed oscillation
waveform
Oscillation
waveform
SYSCLK
Oscillation waveform
High-speed oscillation
waveform
SBYCON.STP bit
LSCLK
HSCLK waveform
HSCLK
Program operating mode
STOP mode
Program operating mode
Interrupt request
TXTL
Low-speed oscillation
8192-pulse count
Hiz
相關(guān)PDF資料
PDF描述
ML610Q422-XXXTBZ03A RISC MICROCONTROLLER, PQFP120
ML610Q422-NNNTBZ03A RISC MICROCONTROLLER, PQFP120
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ML610Q422P-XXXWA RISC MICROCONTROLLER, UUC116
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