參數(shù)資料
型號: ML610Q409P-NNNTBZ03A
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14MM, 0.50 PITCH, PLASTIC, TQFP-100
文件頁數(shù): 9/62頁
文件大?。?/td> 1994K
代理商: ML610Q409P-NNNTBZ03A
Page 15
3. Memory
6
5
f
o
5
0
2
,
1
0
.
v
o
N
0
1
.
1
.
v
e
R
0
1
0
-
8
3
0
B
3
0
J
E
R
p
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o
r
G
0
8
/
C
2
3
M
3. Memory
Figure 3.1 shows a memory map of the M32C/80 Group.
The M32C/80 Group provides 16-Mbyte address space addressed from 00000016 to FFFFFF16.
The fixed interrupt vectors are allocated from address FFFFDC16 to FFFFFF16. It stores the starting ad-
dress of each interrupt routine.
The internal RAM is allocated from address 00040016 to higher. For example, a 8-Kbyte internal RAM is
allocated from address 00040016 to 0023FF16. Besides storing data, it becomes stacks when the subrou-
tine is called or an interrupt is acknowledged.
SFRs, consisting of control registers for peripheral functions such as I/O port, A/D converter, serial I/O,
timers, is allocated from address 00000016 to 0003FF16. All blank spaces within SFRs are reserved and
cannot be accessed by users.
The special page vector table is addressed from FFFE0016 to FFFFDB16. It is used for the JMPS instruc-
tion and JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.
In microprocessor mode, some spaces are reserved and cannot be accessed by users.
SFRs
Internal RAM
Reserved Space
External Space
BRK Instruction
Overflow
Undefined Instruction
FFFFFF16
NMI
00000016
00040016
0023FF16
01000016
FFFFFF16
Special Page
Vector Table
Address Match
Watchdog Timer(1)
Reset
NOTE:
1. Watchdog timer interrupt and oscillation stop detection interrupt share vectors.
FFFFDC16
FFFE0016
Figure 3.1 Memory Map
相關(guān)PDF資料
PDF描述
ML610Q409P-XXXTBZ03A RISC MICROCONTROLLER, PQFP100
ML610Q408-XXXWA RISC MICROCONTROLLER, UUC88
ML610Q412P-XXXWA RISC MICROCONTROLLER, UUC95
ML610Q411-XXXWA RISC MICROCONTROLLER, UUC95
ML610Q422-XXXTBZ03A RISC MICROCONTROLLER, PQFP120
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