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6
5
f
o
5
0
2
,
1
0
.
v
o
N
0
1
.
1
.
v
e
R
0
1
0
-
8
3
0
B
3
0
J
E
R
5. Electrical Characteristics
p
u
o
r
G
0
8
/
C
2
3
M
th(BCLK–HOLD)
tsu(HOLD–BCLK)
td(BCLK–HLDA)
Hi–Z
Measurement Conditions
VCC1=VCC2=4.2 to 5.5V
Input high and low voltage: VIH=4.0V, VIL=1.0V
Output high and low voltage: VOH=2.5V, VOL=2.5V
Memory Expansion Mode and Microprocessor Mode
BCLK
HOLD Input
HLDA Output
P0, P1, P2,
P3, P4,
P50 to P52
RDY input
tsu(RDY–BCLK)
th(BCLK–RDY)
BCLK
RD
(Multiplexed bus)
WR, WRL, WRH
(Separate bus)
RD
(Separate bus)
Vcc1=Vcc2=5V
Figure 5.5 VCC1=VCC2=5V Timing Diagram (4)