參數(shù)資料
型號: ML4826CS-1
元件分類: 基準電壓源/電流源
英文描述: PFC and Dual Output PWM Controller Combo
中文描述: PFC和雙輸出PWM控制器組合
文件頁數(shù): 5/16頁
文件大?。?/td> 296K
代理商: ML4826CS-1
ML4826
5
ELECTRICAL CHARACTERISTICS
(Continued)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PFC
Minimum Duty Cycle
ML4826-1, V
IEAO
> 4.0V
0
%
ML4826-2, V
IEAO
> 5.7V
0
%
Maximum Duty Cycle
V
IEAO
< 1.2V
90
95
%
Output Low Voltage
I
OUT
= –20mA
0.4
0.8
V
I
OUT
= –50mA
0.6
3.0
V
I
OUT
= 10mA, V
CC
= 8V
0.7
1.5
V
Output High Voltage
I
OUT
= 20mA
9.5
10.5
V
I
OUT
= 50mA
9.0
10
V
Rise/Fall Time
C
L
= 1000pF
50
ns
PWM
Duty Cycle Range
0-47
0-48
0-50
%
Output Low Voltage
I
OUT
= –20mA
0.4
0.8
V
I
OUT
= –50mA
0.6
3.0
V
I
OUT
= 10mA, V
CC
= 8V
0.7
1.5
V
Output High Voltage
I
OUT
= 20mA
9.5
10.5
V
I
OUT
= 50mA
9.0
10
V
Rise/Fall Time
C
L
= 1000pF
50
ns
SUPPLY
Shunt Regulator Voltage (V
CCZ
)
12.8
13.5
14.2
V
V
CCZ
Load Regulation
25mA < I
CC
< 55mA
±
150
±
300
mV
V
CCZ
Total Variation
Load, temp
12.4
14.6
V
Start-up Current
V
CC
= 11.2V, C
L
= 0
0.7
1.1
mA
Operating Current
V
CC
< V
CCZ
– 0.5V, C
L
= 0
22
28
mA
Undervoltage Lockout Threshold
12
13
14
V
Undervoltage Lockout Hysteresis
2.65
3.0
3.35
V
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2:
Includes all bias currents to other circuits connected to the V
FB
pin.
Note 3:
Gain = K x 5.3V; K = (I
GAINMOD
- I
OFFSET
) x I
AC
x (VEAO - 1.5V)
-1
.
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