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參數(shù)資料
| 型號(hào)： | ML4826CS-1 |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | PFC and Dual Output PWM Controller Combo |
| 中文描述： | PFC和雙輸出PWM控制器組合 |
| 文件頁(yè)數(shù)： | 12/16頁(yè) |
| 文件大小： | 296K |
| 代理商： | ML4826CS-1 |
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ML4826
12
current source. The circuit guarantees that the maximum
operating current is available at all times and minimizes
the worst case power dissipation in the IC.
Other methods such as a simple series resistor are
possible, but can very easily lead to excessive I
CC
current
in the ML4826. Figures 6 and 7 show other possible
methods for feeding V
CC
.
LEADING/TRAILING MODULATION
Conventional Pulse Width Modulation (PWM) techniques
employ trailing edge modulation in which the switch will
turn on right after the trailing edge of the system clock. The
error amplifier output voltage is then compared with the
modulating ramp. When the modulating ramp reaches the
level of the error amplifier output voltage, the switch will
be turned OFF. When the switch is ON, the inductor
current will ramp up. The effective duty cycle of the
trailing edge modulation is determined during the ON
time of the switch. Figure 4 shows a typical trailing edge
control scheme.
In the case of leading edge modulation, the switch is
turned OFF right at the leading edge of the system clock.
When the modulating ramp reaches the level of the error
amplifier output voltage, the switch will be turned ON.
The effective duty-cycle of the leading edge modulation is
determined during the OFF time of the switch. Figure 5
shows a leading edge control scheme.
One of the advantages of this control technique is that it
requires only one system clock. Switch 1 (SW1) turns off
and switch 2 (SW2) turns on at the same instant to
minimize the momentary “no-load” period, thus lowering
ripple voltage generated by the switching action. With
such synchronized switching, the ripple voltage of the first
stage is reduced. Calculation and evaluation have shown
that the 120Hz component of the PFC’s output ripple
voltage can be reduced by as much as 30% using this
method.
FUNCTIONAL DESCRIPTION
(Continued)
ML4826
V
CC
RTN
RECTIFIED
V
AC
20V
1
μ
F
1500
μ
F
39k
18
GATE
DRIVE
22k
T1
Q2
MJE200
Q1
2N2222
ML4826
V
CC
RTN
V
BIAS
1
μ
F
ML4826
V
CC
RTN
V
BIAS
Figure 5. V
CC
Bias Circuitry
Figure 6.
Figure 7.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ML4826CS-2 | PFC and Dual Output PWM Controller Combo |
| ML4826IP-1 | PFC and Dual Output PWM Controller Combo |
| ML4826IP-2 | PFC and Dual Output PWM Controller Combo |
| ML4826CP2 | PFC and Dual Output PWM Controller Combo |
| ML4826 | PFC and Dual Output PWM Controller Combo |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML4826CS-2 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:PFC and Dual Output PWM Controller Combo |
| ML4826IP-1 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:PFC and Dual Output PWM Controller Combo |
| ML4826IP2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ML4826IP-2 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:PFC and Dual Output PWM Controller Combo |
| ML4826IS-1 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:PFC and Dual Output PWM Controller Combo |
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