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參數(shù)資料
| 型號： | ML1I-67203V-65/883 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | FIFO |
| 英文描述： | 2K X 9 OTHER FIFO, 65 ns, CDIP28 |
| 封裝： | 0.600 INCH, CERAMIC, DIP-28 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 145K |
| 代理商： | ML1I-67203V-65/883 |
L 67203/L 67204
MATRA MHS
Rev. C (10/11/94)
16
Figure 18. Write Data Flow – Through Mode.
Ordering Information
C
C = Commercial
0
° to +70°C
I = Industrial
–40
° to +85°C
A = Automotive
–40
° to +125°C
M = Military
–55
° to +125°C
S = Space
–55
° to +125°C
* On request only
L
M = 5 V version
L = 3.3 V version
3P
1I = 28 pin DIL ceramic 600 mils
3P = 28 pin DIL plastic 300 mils
4J = 32 pin LCC rectangular
S1 = 32 pin PLCC
*UI = 28 pin SOJ plastic 300 mils
*TI = 28 pin SOL plastic 300 mils
67204L
67203 = 2048
× 9 FIFO
67204 = 4096
× 9 FIFO
L = Low power
V = Very low power
EL = Low power and rad tolerant
EV = Very low power and rad tolerant
55
55 ns
60 ns
65 ns
Blank
=
MHS standards
/883
=
MIL-STD 883 CLASS B or S
CB
=
Compliant CECC 90000
level B
SHXXX =
Special customer request
FHXXX =
Flight models (space)
MHXXX =
Mechanical parts
(space)
LHXXX =
Life test parts (space)
TEMPERATURE RANGE
PACKAGE
DEVICE
SPEED
FLOW
The information contained herein is subject to change without notice. No responsibility is assumed by MATRA MHS SA for using this publication
and/or circuits described herein : nor for any possible infringements of patents or other rights of third parties which may result from its use.
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