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參數(shù)資料
| 型號： | MK50H25PLCC |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | HIGH SPEED LINK LEVEL CONTROLLER |
| 中文描述： | 高速鏈路層控制器 |
| 文件頁數(shù)： | 1/64頁 |
| 文件大?。?/td> | 515K |
| 代理商： | MK50H25PLCC |
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MK50H25
HIGH SPEED
LINK LEVEL CONTROLLER
ADVANCE DATA
SECTION 1 - FEATURES
System clock rate up to 33 MHz (MK50H25 -
33), 25 MHz (MK50H25 - 25), or 16 MHz
(MK50H25- 16).
Data
rate
up
to
(MK50H25- 33)or up to 51 Mbpsbursted
On chip DMA control with programmable burst
length.
DMA transfer rate of up to 13.3 Mbytes/secus-
ing optional 5 SYSCLK DMA cycle (150 nS) at
33 MHz SYSCLK.
Complete Level 2 implementation compatible
with X.25 LAPB, ISDN LAPD, X.32, and X.75
Protocols.
Handles all error recovery, sequencing, and S
and U frame control.
Pin-for-pin and architecturally compatible with
MK5025 (X.25/LAPD), MK5027 (CCS#7) and
MK5029(SDLC).
BufferManagement includes:
- Initialization Block
- SeparateReceive and Transmit Rings
- VariableDescriptor Ringand WindowSizes.
Separate64-byte Transmit andReceive FIFO.
Programmable Transmit FIFO hold-off water-
mark.
Handlesall HDLC frame formatting:
- Zero bit insertionand deletion
- FCS (CRC)generationand detection
- Frame delimiting with flags
Programmable Single or Extended Address
and Controlfields.
Five programmable timer/counters:
TP,N1, N2
Programmable minimum frame spacing on
transmission
(number
frames).
- Programmable from 1 to 62 flags between
frames
Selectable FCS (CRC) of 16 or 32 bits, and
passingof entire FCS to buffer.
TestingFacilities:
- Internal Loopback
- Silent Loopback
- OptionalInternal Data Clock Generation
- Self Test.
Programmablefor full or half duplexoperation
20
Mbps
continuous
T1, T3,
of
flags
between
Programmable Watchdog Timers for RCLK
and TCLK(to detectabsence of data clocks)
Option causing received data to effectively be
odd-byte aligned, in addition to standard even-
byte alignment.
Available in 52 pin PLCC, 84 pin PLCC(for use
with externalROM), or 48 pin DIP packages.
SECTION 2 - INTRODUCTION
The SGS - Thomson MK502H5 Link Level Con-
troller is a VLSI semiconductor device which pro-
vides complete link level data communications
control conforming to the 1984 and 1988 CCITT
versions of X.25. The MK50H25 will perform
frame formating including: frame delimiting with
flags, transparency (so-called ”bit-stuffing”), error
recovery by retransmission, sequence number
control, S (supervisory) and U (unnumbered)
frame control, plus FCS (CRC) generation and
detection. The MK50H25 also supports X.75 and
X.32 (with its XID frame support), as well as sin-
gle channel ISDN LAPD (with its support of UI
framesand extendedaddressingcapabilities).
July 1994
DIP48
PLCC 52
1/64
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK50H25Q | HIGH SPEED LINK LEVEL CONTROLLER |
| MK50H27PLCC | Category 5e Patch Cord; Connector Type A:Cat 5e Modular Plug; Connector Type B:Cat 5e Modular Jack; Cable Length:3ft; Color:Blue; Features:Snagless Slimline Boot; Cable Strain Relief |
| MK50H27 | Signalling System 7 Link Controller |
| MK50H27DIP | Signalling System 7 Link Controller |
| MK50H27Q | Signalling System 7 Link Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK50H25Q | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH SPEED LINK LEVEL CONTROLLER |
| MK50H25Q25B | 制造商:STMicroelectronics 功能描述:HDLC CONTROLLER - Rail/Tube |
| MK50H25Q33B | 功能描述:射頻無線雜項 Hi-Speed Cont 33MHz RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
| MK50H25TQ16 | 制造商:STMicroelectronics 功能描述:HDLC CONTROLLER - Bulk |
| MK50H25TQ25 | 制造商:STMicroelectronics 功能描述:HDLC CONTROLLER - Bulk |
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