參數(shù)資料
型號: MK50DX256ZCLK10
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, LQFP-80
文件頁數(shù): 7/78頁
文件大?。?/td> 1068K
代理商: MK50DX256ZCLK10
Table 4. Voltage and current operating behaviors (continued)
Symbol
Description
Min.
Max.
Unit
Notes
IOLT
Output low current total for all ports
100
mA
IIN
Input leakage current (per pin) for full temperature
range except TRI0_DM, TRI0_DP, TRI1_DM,
TRI1_DP
1
μA
IIN
Input leakage current (per pin) at 25°C except
TRI0_DM, TRI0_DP, TRI1_DM, TRI1_DP
TBD
μA
IILKG_A
Input leakage current (per pin) for TRI0_DM,
TRI0_DP, TRI1_DM, TRI1_DP
5
nA
IOZ
Hi-Z (off-state) leakage current (per pin)
1
μA
RPU
Internal pullup resistors
20
50
RPD
Internal pulldown resistors
20
50
1. Measured at VDD=3.6V
2. Measured at VDD supply voltage = VDD min and Vinput = VSS
3. Measured at VDD supply voltage = VDD min and Vinput = VDD
5.1.4 Power mode transition operating behaviors
All specifications except tPOR, and VLLSx→RUN recovery times in the following table
assume this clock configuration:
CPU and system clocks = 100 MHz
Bus clock = 50 MHz
FlexBus clock = 50 MHz
Flash clock = 25 MHz
Table 5. Power mode transition operating behaviors
Symbol
Description
Min.
Max.
Unit
Notes
tPOR
After a POR event, amount of time from the point VDD
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
300
μs
RUN → VLLS1 → RUN
RUN → VLLS1
VLLS1 → RUN
4.1
123.8
μs
RUN → VLLS2 → RUN
RUN → VLLS2
VLLS2 → RUN
4.1
49.3
μs
Table continues on the next page...
General
K50 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Freescale Semiconductor, Inc.
Preliminary
15
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