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參數(shù)資料
| 型號： | MK3720DLF |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SOIC-8 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 112K |
| 代理商： | MK3720DLF |
27 MHZ AND 54 MHZ 3.3 VOLT VCXO
MDS 3720 I
3
Revision 061705
In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297-1 201 ● www.icst.com
MK3720
External Component Selection
The MK3720 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD (pin 2) and GND (pin 4), as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output (CLK,
pin 5) and the load is over 1 inch, series termination
should be used. To series terminate a 50
trace (a
commonly used trace impedance) place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
.
Quartz Crystal
The MK3720 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The MK3720 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the MK3720 is designed to have zero frequency
error when the total of on-chip + stray capacitance is
14 pF.
Recommended Crystal Parameters:
See application note MAN05 for crystal information.
MAN05 is available on the internet at
www.icst.com/pdf/man05.pdf.
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the MK3720. There should be no via’s between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these
capacitors can be found in application note MAN05.
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| MK3724GILFTR | 73.728 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3727JLFTR | 36 MHz, OTHER CLOCK GENERATOR, PDSO8 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MK3720DLFTR | 功能描述:時鐘合成器/抖動清除器 27MHZ AND 54MHZ 3.3V VCXO RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK3720DTR | 功能描述:時鐘合成器/抖動清除器 27MHZ AND 54MHZ 3.3V VCXO RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK3720S | 制造商:ICS 制造商全稱:ICS 功能描述:27 MHz and 54 MHz 3.3 Volt VCXO |
| MK3720STR | 制造商:ICS 制造商全稱:ICS 功能描述:27 MHz and 54 MHz 3.3 Volt VCXO |
| MK3721 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Cost 3.3 Volt VCXO |
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