參數(shù)資料
型號(hào): MK3712SLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 27 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: 0.150 INCH, SOIC-8
文件頁(yè)數(shù): 2/6頁(yè)
文件大?。?/td> 73K
代理商: MK3712SLF
3.3 VOLT SET-TOP BOX VCXO
MDS 3712 B
2
Revision 091801
Int egrat ed C i rcuit Syste ms q 525 R a ce S t r eet, San Jose, CA 95126 q t e l (40 8 ) 295 -9800 q
w w w. icst . c om
MK3712
Pin Assignment
Pin Descriptions
X1
VDD
VIN
27M
GND
11.0592M
13.5M
X2
1
2
3
4
8
7
6
5
M K 3 712S
M K 3 712D
8 Pi n (150 mi l ) SO I C
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
XI
Input
Crystal connection. Connect to the external pullable crystal.
2
VDD
Power
Connect to +3.3 V (0.01uf decoupling capacitor recommended)
3
VIN
Input
Voltage input to VCXO. Zero to 3.3 V analog input which controls the
oscillation frequency of the VCXO.
4
GND
Power
Connect to ground.
5
13.5M
Output
13.5 MHz VCXO clock output.
6
11.0592M
Output
11.0592 MHz clock output.
7
27M
Output
27 MHz VCXO clock output.
8
X2
Input
Crystal connection. Connect to the external pullable crystal.
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