參數(shù)資料
型號: MK30N512VMD100
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144
封裝: 13 X 13 MM, MAPBGA-144
文件頁數(shù): 24/72頁
文件大?。?/td> 1847K
代理商: MK30N512VMD100
6.4.1 Flash (FTFL) electrical specifications
This section describes the electrical characteristics of the FTFL module.
6.4.1.1 Flash timing specifications — program and erase
The following specifications represent the amount of time the internal charge pumps are
active and do not include command overhead.
Table 18. NVM program/erase timing specifications
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
thvpgm4
Longword Program high-voltage time
20
TBD
μs
thversscr
Sector Erase high-voltage time
20
100
ms
thversblk256k Erase Block high-voltage time for 256 KB
160
800
ms
1. Maximum time based on expectations at cycling end-of-life.
6.4.1.2 Flash timing specifications — commands
Table 19. Flash command timing specifications
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
trd1blk256k
Read 1s Block execution time
256 KB data flash
1.4
ms
trd1sec2k
Read 1s Section execution time (flash sector)
40
μs
tpgmchk
Program Check execution time
35
μs
trdrsrc
Read Resource execution time
35
μs
tpgm4
Program Longword execution time
50
TBD
μs
tersblk256k
Erase Flash Block execution time
256 KB data flash
160
800
ms
tersscr
Erase Flash Sector execution time
20
100
ms
tpgmsec512
tpgmsec1k
tpgmsec2k
Program Section execution time
512 B flash
1 KB flash
2 KB flash
TBD
ms
trd1all
Read 1s All Blocks execution time
2.8
ms
trdonce
Read Once execution time
35
μs
tpgmonce
Program Once execution time
50
TBD
μs
Table continues on the next page...
Peripheral operating requirements and behaviors
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
30
Preliminary
Freescale Semiconductor, Inc.
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