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參數(shù)資料
| 型號： | MK1493-14GLF |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 100 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封裝： | 0.173 INCH, ROHS COMPLIANT, MO-153, TSSOP-28 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 167K |
| 代理商： | MK1493-14GLF |
SPREAD SPECTRUM CLOCK GENERATOR
MDS 1493-14 A
13
Revision 082205
In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297-1 201 ● www.icst.com
MK1493-14
Clock Details and Topology
The topology of each 100MHz circuit is shown for reference in Fig 1
Fig 1- Clock chip Outputs current and translation to voltage is done on the motherboard for destination chip.
Topology Details
L1= 0.5”
L2, L3 =0.25”
L4=8”
RS1,RS2 = 33 +/ 5%
RT1, RT2 = 49.9 +/ 1%
Receiver has no internal termination.
Length of L3 should be minimized to improve signal integrity.
L4 will have two to a maximum of four vias.
R
S1
+
-
DC
Clock Chip
+
-
Destination Chip
L1
L2
L1
L2
R
S2
L3
R
T1
L3
R
T2
L4
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