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參數(shù)資料
| 型號(hào)： | MK1492-04R |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 75 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封裝： | 0.150 INCH, SSOP-28 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大小： | 102K |
| 代理商： | MK1492-04R |
MK1492-04
OPTi Firestar+ Clock Source
MDS1492-04C
3
Revision 4308
Printed 4/30/98
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
PRELIMINARY INFORMATION
ICRO
CLOCK
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (note 2)
Supply voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 10 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 3.3V unless noted)
Operating Voltage, VDD
3.0
3.3
3.6
V
Operating Voltage, VDD
2.5/3.3
VDD
V
Input High Voltage, VIH
2
V
Input Mid-Level Voltage, VIM
1.2
1.6
V
Input Low Voltage, VIL
0.8
V
Output High Voltage, VOH
IOH=-8mA
2.4
V
Output Low Voltage, VOL
IOL=8mA
0.4
V
Output High Voltage, VOH
IOH=-8mA
VDD-0.4
V
Operating Supply Current, IDD
No Load, 66.6MHz
62
mA
Power Down mode Supply Current
3
Α
Short Circuit Current, single output driver
VDD=3.3V
±60
mA
VDD=2.5V
±35
Input Capacitance
7
pF
AC CHARACTERISTICS (VDD = 3.3V unless noted)
Input Frequencies
14.318
MHz
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
0.4 to 2.0V for VDD=2.5V
Output Clock Fall Time
2.0 to 0.8V;
1.5
ns
2.0 to 0.4V for VDD=2.5V
Output Clock Duty Cycle, all MHz clocks
At 1.5V;
45
49 to 51
55
%
1.25V for VDD=2.5 V
HOST2:8 Output to Output Skew
Rising edges at 1.5V;
250
ps
1.25V for VDD=2.5V
Skew of EHOST1 with respect to HOST 2:8
3.5
ns
PCI Output to Output Skew
Rising edges at 1.5V
500
ps
Lead of EHOST1 output with respect to PCI
Rising edges at 1.5V
1
1.75
4
ns
Cycle to Cycle Jitter, CPU Clocks
250
ps
Absolute Clock Period Jitter, Other MHz Clocks
-500
500
ps
EMI reduction, peaks of 5th - 19th odd harmonics
66.6 MHz HOST clock
6
11
dB
Power up time, CPUS# going high to all clocks stable
8
20
ms
Power on time, applied VDD to all clocks stable
12
25
ms
Note 2.
Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the
operating limits but below the Absolute Maximums may affect device reliability.
HOST1,2 or 3,4
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| MK1493-01G | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
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| MK1493-01GLF | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| MK1493-01GTR | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
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相關(guān)代理商/技術(shù)參數(shù) |
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| MK1493-01 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:PCI Clock Generator |
| MK1493-01G | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:PCI Clock Generator |
| MK1493-01GTR | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:PCI Clock Generator |
| MK1493-03B | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:PCI CLOCK GENERATOR |
| MK1493-03BGILF | 制造商:Integrated Device Technology Inc 功能描述:DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER, TSSOP16 - Rail/Tube |
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