參數(shù)資料
型號: MK10DN512ZVMB10R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA81
封裝: 8 X 8 MM, MAPBGA-81
文件頁數(shù): 47/69頁
文件大?。?/td> 981K
代理商: MK10DN512ZVMB10R
Table 35. VREF full-range operating behaviors (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
Vout
Voltage reference output with— factory trim
TBD
TBD
V
Vout
Voltage reference output — user trim
1.198
1.202
V
Vstep
Voltage reference trim step
0.5
mV
Vdrift
Temperature drift (Vmax -Vmin across the full
temperature range)
40
mV
See
Ac
Aging coefficient
TBD
ppm/year
Ibg
Bandgap only (MODE_LV = 00) current
TBD
A
Itr
Tight-regulation buffer (MODE_LV =10) current
1.1
mA
ΔVLOAD
Load regulation (MODE_LV = 10)
current = + 1.0 mA
current = - 1.0 mA
TBD
mV
Tstup
Buffer startup time
100
s
DC
Line regulation (power supply rejection)
TBD
mV
–60
TBD
dB
1. Load regulation voltage is the difference between the VREF_OUT voltage with no load vs. voltage with defined load
Table 36. VREF limited-range operating requirements
Symbol
Description
Min.
Max.
Unit
Notes
TA
Temperature
0
50
°C
Table 37. VREF limited-range operating behaviors
Symbol
Description
Min.
Max.
Unit
Notes
Vout
Voltage reference output with factory trim
TBD
V
TBD
Figure 19. Typical output vs.temperature
TBD
Figure 20. Typical output vs. VDD
6.7 Timers
Peripheral operating requirements and behaviors
K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Freescale Semiconductor, Inc.
Preliminary
51
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