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參數(shù)資料
| 型號： | MJW16212 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 功率晶體管 |
| 英文描述： | POWER TRANSISTOR 10 AMPERES 1500 VOLTS - VCES 50 AND 150 WATTS |
| 中文描述： | 10 A, 650 V, NPN, Si, POWER TRANSISTOR, TO-247AE |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 291K |
| 代理商： | MJW16212 |
3–3
Motorola Bipolar Power Transistor Device Data
SAFE OPERATING AREA (continued)
FORWARD BIAS
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
The data of Figure 1 is based on TC = 25 C; TJ(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC
≥
25 C. Second breakdown limitations do not der-
ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 1 may be found at any case tem-
perature by using the appropriate curve on Figure 3.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limita-
tions imposed by second breakdown.
Figure 3. Power Derating
25
TC, CASE TEMPERATURE (
°
C)
0
45
85
125
0.6
P
SECOND BREAKDOWN
DERATING
1
0.8
0.4
0.2
65
THERMAL
DERATING
105
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc.
The safe level for these devices is specified as Reverse
Biased Safe Operating Area and represents the voltage–
current condition allowable during reverse biased turnoff.
This rating is verified under clamped conditions so that the
device is never subjected to an avalanche mode. Figure 2
gives the RBSOA characteristics.
H.P. 214
OR EQUIV.
P.G.
0
≈
–35 V
50
500
1
μ
F
100
–V
2N5337
2N6191
+V
≈
11 V
100
0.02
μ
F
20
10
μ
F
0.02
μ
F
+
–
RB1
RB2
A
A
50
T1
+V
0 V
–V
*IB
*IC
T.U.T.
L
MR856
Vclamp
VCC
IC
VCE
IB
IB1
IB2
IC(pk)
VCE(pk)
T1
Lcoil(ICpk)
VCC
Note: Adjust –V to obtain desired VBE(off) at Point A.
T1 adjusted to obtain IC(pk)
V(BR)CEO
L = 10 mH
RB2 =
∞
VCC = 20 Volts
RBSOA
L = 200
μ
H
RB2 = 0
VCC = 20 Volts
RB1 selected for desired IB1
*Tektronix
*
P–6042 or
*
Equivalent
+
–
Table 1. RBSOA/V(BR)CEO(SUS) Test Circuit
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