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| 型號(hào)： | MJE13007DW |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 功率晶體管 |
| 英文描述： | 8 A, 400 V, NPN, Si, POWER TRANSISTOR |
| 封裝： | PLASTIC, TO-220AB, 3 PIN |
| 文件頁(yè)數(shù)： | 34/66頁(yè) |
| 文件大?。?/td> | 462K |
| 代理商： | MJE13007DW |
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MJE13007 MJF13007
3–670
Motorola Bipolar Power Transistor Device Data
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate IC —VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
The data of Figure 6 is based on TC = 25°C; TJ(pk) is vari-
able depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25°C. Second breakdown limitations do not der-
ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 6 may be found at any case tem-
perature by using the appropriate curve on Figure 8.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limita-
tions imposed by second breakdown.
Use of reverse biased safe operating area data (Figure 7)
is discussed in the applications information section.
1000
10
20
30
70 100
200
50
300
500
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 6. Maximum Forward Bias
Safe Operating Area
I C
,C
OLLE
CT
OR
C
URREN
T
(AMPS
)
0
100
200
300
400
500
600
700
800
I C
,COLLECT
OR
CURRENT
(AMPS)
VCEV, COLLECTOR–EMITTER CLAMP VOLTAGE (VOLTS)
Figure 7. Maximum Reverse Bias Switching
Safe Operating Area
20
40
60
80
100
120
140
160
TC, CASE TEMPERATURE (°C)
Figure 8. Forward Bias Power Derating
POWER
D
ERA
T
ING
FA
CT
OR
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
10 k
r(t),
TRANSIENT
THERMAL
RESIST
ANCE
(NORMALIZED)
t, TIME (msec)
Figure 9. Typical Thermal Response for MJE13007
DUTY CYCLE, D = t1/t2
t1
R
θJC(t) = r(t) RθJC
R
θJC = 1.56°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) R
θJC(t)
P(pk)
t2
20
10
5
1
0.5
0.02
0.05
0.2
0.1
2
100
50
0.01
10
8
6
4
2
0
1
0.8
0.6
0.4
0.2
0
1
0.01
0.02
0.05
0.1
0.2
0.5
0.07
0.7
Extended SOA @ 1
s, 10 s
10
s
1
s
1 ms
5 ms
DC
TC = 25°C
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
CURVES APPLY BELOW
RATED VCEO
TC ≤ 100°C
GAIN
≥ 4
LC = 500 H
VBE(off)
–5 V
–2 V
0 V
SECOND BREAKDOWN
DERATING
THERMAL
DERATING
D = 0.5
D = 0.2
D = 0.1
D = 0.05
D = 0.02
D = 0.01
SINGLE PULSE
相關(guān)PDF資料 |
PDF描述 |
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| MJE13007BU | 8 A, 400 V, NPN, Si, POWER TRANSISTOR |
| MJE13007BC | 8 A, 400 V, NPN, Si, POWER TRANSISTOR |
| MJE13007BA | 8 A, 400 V, NPN, Si, POWER TRANSISTOR |
| MJE13007AJ | 8 A, 400 V, NPN, Si, POWER TRANSISTOR |
| MJE13007AN | 8 A, 400 V, NPN, Si, POWER TRANSISTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MJE13007F | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:High Voltage Switch Mode Application |
| MJE13007F_05 | 制造商:KEC 制造商全稱:KEC(Korea Electronics) 功能描述:TO-220IS PACKAGE |
| MJE13007F_08 | 制造商:KEC 制造商全稱:KEC(Korea Electronics) 功能描述:TRIPLE DIFFUSED NPN TRANSISTOR |
| MJE13007G | 功能描述:兩極晶體管 - BJT 8A 400V 80W NPN RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發(fā)射極最大電壓 VCEO:- 40 V 發(fā)射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產(chǎn)品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
| MJE13007G-M-TA3-T | 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:NPN BIPOLAR POWER TRANSISTOR FOR SWITCHING POWER SUPPLY APPLICATIONS |
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