參數(shù)資料
型號: MIP7965-668F24M
元件分類: 微控制器/微處理器
英文描述: 64-BIT, 668 MHz, MICROPROCESSOR, CQFP208
封裝: 1.120 X 1.120 INCH, INVERTED, CERAMIC, QFP-208
文件頁數(shù): 12/18頁
文件大?。?/td> 310K
代理商: MIP7965-668F24M
3
SCD7965 Rev H 10/01/10
Aeroflex Plainview
INTRODUCTION
The MIP7965 comprise a new family of high-performance 64-bit microprocessors. This product is optimized for performance with
features including a seven-stage dual-issue pipeline, tightly coupled L1 and L2 caches, and sophisticated branch prediction for
maintaining pipeline efficiency.
A 200 MHz 64-bit multiplexed system address and data bus (SysAD) enables a high-bandwidth I/O interface to a variety of system
controllers providing connectivity to a wide range of networking peripherals. All products also contain vectored and prioritized
interrupt controllers for versatile interrupt configurations.
On-chip EJTAG debug modules ensure smooth and easy debugging for both hardware and software by allowing single-step and state
examination. The inclusion of a pipeline-rate branch instruction trace buffer facilitates debugging under operating conditions.
The MIP7965 is available in a 256-TBGA and 208-lead CQFP package. The 256-TBGA package is pin compatible with previous
RM7065x devices. The RM7965 products offer a cost advantage by eliminating the L3 cache controller functionality available with the
RM7900.
For additional Detail Information regarding the operation of the PMC-Sierra see the latest PMC-Sierra datasheet for the RM79xx
Family Microprocessors Data Sheet (doc. # PMC-2030581), Issue No. 11: September, 2006
相關(guān)PDF資料
PDF描述
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