參數(shù)資料
型號(hào): MIC2310-2ZTS TR
廠商: Micrel Inc
文件頁數(shù): 32/34頁
文件大小: 473K
描述: IC HOT SWAP CTLR 2CHAN 24TSSOP
標(biāo)準(zhǔn)包裝: 2,500
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開關(guān):
電流限制: 可調(diào)
電源電壓: 10.8 V ~ 13.2 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
Micrel, Inc.
MIC2310
 
 
July 2008 
32
M9999-070108-A
 
VISS Output Operation
The   VISS   output   provides   a   voltage   which   is
proportional to the output current flowing in the
external sense resistor. Figure 18 illustrates the
operation of this output. With the applied V
CC
 supply
high such that the internal V
REG
 voltage is above the
controllers V
VREG(UVLOH)
 threshold voltage, an elapsed
POR timer, and with the application of an ENABLE
LOW-to-HIGH transition, the GATE drive circuitry is
enabled. When the output load voltage profile is
higher than the controllers V
PGH
 threshold voltage and
the V
GS
  of the external MOSFET is higher than the
controllers V
GSPGH
  threshold voltage, the PWRGD
digital output is asserted and the VISS output
becomes active. The current flowing in the external
sense resistor is determined by sensing the voltage
across the sense resistor (V
CCSENSE
-V
SENSE
). As the
output current varies under changing load conditions,
V
CCSENSE
-V
SENSE
  also varies and the VISS output
voltage changes proportionally according to V
ISS(SENS)
.
When the external MOSFET is disabled, either by a
HIGH-to-LOW transition on ENABLE or due to a fault
condition, the V
GS
 of the external MOSFET falls below
the controllers V
GSPGH
 threshold voltage. This causes
the PWRGD digital output to be de-asserted and the
VISS output to be disabled.
 
V
CC
 & V
REG
ENABLE
GATE
V
OUT
I
LOAD
PWRGD
VISS
DISCH
VVREG(UVLOH)
V
VREG(UVLOL)
V
GSPGH
V
PGH
V
GSPGH
V
PGL
t
POR
 
 
Figure 18. VISS Operation
 
 
 
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