參數(shù)資料
型號(hào)： MIC2086-MBQS TR
廠商： Micrel Inc
文件頁數(shù)： 14/29頁
文件大小： 1008K
描述： IC CTRLR HOW SWAP SGL 20-QSOP
標(biāo)準(zhǔn)包裝： 2,500
類型： 熱交換控制器
應(yīng)用： 通用型 Infiniband?
內(nèi)部開關(guān)： 無
電源電壓： 2.3 V ~ 16.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 20-QSOP
包裝： 帶卷 (TR)
其它名稱： MIC2086-MBQSTR
MIC2086-MBQSTR-ND
Micrel, Inc.
MIC2085/2086
 
 
May 2006 
14
M9999-050406
(408) 955-1690
 
Functional Description 
Hot Swap Insertion
When circuit boards are inserted into live system
backplanes and supply voltages, high inrush currents
can result due to the charging of bulk capacitance that
resides across the supply pins of the circuit board. This
inrush current, although transient in nature, may be high
enough to cause permanent damage to on-board
components or may cause the systems supply voltages
to go out of regulation during the transient period which
may result in system failures. The MIC2085/86 acts as a
controller for external N-Channel MOSFET devices in
which the gate drive is controlled to provide inrush
current limiting and output voltage slew rate control
during hot plug insertions.
Power Supply
VCC is the supply input to the MIC2085/86 controller
with a voltage range of 2.3V to 16.5V. The VCC input
can with stand transient spikes up to 33V. In order to
help suppress transients and ensure stability of the
supply voltage, a capacitor of 1.0礔 to 10礔 from VCC
to ground is recommended. Alternatively, a low pass
filter, shown in the typical application circuit, can be used
to eliminate high frequency oscillations as well as help
suppress transient spikes.
Start-Up Cycle
When the voltage on the ON pin rises above its
threshold of 1.24V, the MIC2085/86 first checks that its
supply (V
CC
) is above the UVLO threshold. If it does
check above, the device is enabled and an internal 2礎(chǔ)
current source begins charging capacitor C
POR
 to 1.24V
to initiate a start-up sequence (i.e., start-up delay times
out). Once the start-up delay (t
START
) elapses, CPOR is
pulled immediately to ground and a 15礎(chǔ) current source
begins charging the GATE output to drive the external
MOSFET that switches V
IN
  to V
OUT
. The programmed
start-up delay is calculated using the following equation:
 
(  )
礔
C
0.62
I
V
C
t
POR
CPOR
TH
POR
START
?/DIV>
E
?/DIV>
=
  (1)
where V
TH
, the POR delay threshold, is 1.24V, and I
CPOR
,
the POR timer current, is 2礎(chǔ). As the GATE voltage
continues ramping toward its final value (VCC + VGS) at
a defined slew rate (See Load Capacitance/Gate
Capacitance Dominated Start-Up sections), a second
CPOR timing cycle begins if:1)/FAULT is high and
2)CFILTER is low (i.e., not an overvoltage, undervoltage
lockout, or overcurrent state).This second timing cycle,
t
POR
, starts when the voltage at the FB pin exceeds its
threshold (V
FB
) indicating that the output voltage is valid.
The time period t
POR
 is equivalent to t
START
 and sets the
interval for the /POR to go Low-to-High after power is
good (See Figure 2 of Timing Diagrams). Active
current regulation is employed to limit the inrush current
transient response during start-up by regulating the load
current at the programmed current limit value (See
Current   Limiting   and   Dual-Level   Circuit   Breaker
section). The following equation is used to determine the
nominal current limit value:
 
SENSE
SENSE
TRIPSLOW
LIM
R
48mV
R
V
I
=
=
  (2)
where V
TRIPSLOW
  is the current limit slow trip threshold
found in the electrical table and R
SENSE
 is the selected
value that will set the desired current limit. There are two
basic start-up modes for the MIC2085/86: 1)Start-up
dominated   by   load   capacitance   and   2)start-up
dominated by total gate capacitance. The magnitude of
the inrush current delivered to the load will determine the
dominant mode. If the inrush current is greater than the
programmed current limit (ILIM), then load capacitance
is dominant. Otherwise, gate capacitance is dominant.
The expected inrush current may be calculated using the
following equation:
 
GATE
LOAD
GATE
LOAD
GATE
C
C
 
15?/DIV>
C
C
I
INRUSH
?/DIV>
?/DIV>
E
?/DIV>
E
  (3)
where I
GATE
 is the GATE pin pull-up current, C
LOAD
 is the
load   capacitance,   and   C
GATE
   is   the   total   GATE
capacitance (CISS of the external MOSFET and any
external capacitor connected from the MIC2085/86
GATE pin to ground).
Load Capacitance Dominated Start-Up
In this case, the load capacitance, C
LOAD
, is large
enough to cause the inrush current to exceed the
programmed current limit but is less than the fast-trip
threshold (or the fast-trip threshold is disabled, M
option). During start-up under this condition, the load
current is regulated at the programmed current limit
value (ILIM) and held constant until the output voltage
rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
following equation:
 
LOAD
LIM
OUT
C
I
/dt
dV
 
Rate,
Slew
 
 Voltage
Output
=
  (4)
where I
LIM
  is the programmed current limit value.
Consequently, the value of C
FILTER
 must be selected to
ensure that the overcurrent response time, t
OCSLOW
,
exceeds the time needed for the output to reach its final
value. For example, given a MOSFET with an input
capacitance C
ISS
  = C
GATE
  =4700pF, C
LOAD
  is 2200礔,
and I
LIMIT
  is set to 6A with a 12Vinput, then the load
capacitance dominates as determined by the calculated
INRUSH > I
LIM
. Therefore, the output voltage slew rate
determined from Equation 4 is:
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