134
ATtiny25/45/85 [DATASHEET]
2586Q–AVR–08/2013
where ADCH and ADCL are the ADC data registers, k is the fixed slope coefficient and T
OS is the temperature sen-
sor offset. Typically, k is very close to 1.0 and in single-point calibration the coefficient may be omitted. Where
higher accuracy is required the slope coefficient should be evaluated based on measurements at two
temperatures.
17.13 Register Description
17.13.1
ADMUX – ADC Multiplexer Selection Register
Bits 7:6, 4 – REFS[2:0]: Voltage Reference Selection Bits
These bits select the voltage reference (V
REF) for the ADC, as shown in Table 17-3. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSR is set).
Whenever these bits are changed, the next conversion will take 25 ADC clock cycles. When differential channels
and gain are used, using V
CC or an external AREF higher than (VCC - 1V) as a voltage reference is not
recommended as this will affect the ADC accuracy.
Note:
1. The device requries a supply voltage of 3V in order to generate 2.56V reference voltage.
Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one to
ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC
Data Register immediately, regardless of any ongoing conversions. For a complete description of this bit, see
Bits 3:0 – MUX[3:0]: Analog Channel and Gain Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC. In case of differential
input (ADC0 - ADC1 or ADC2 - ADC3), gain selection is also made with these bits. Selecting ADC2 or ADC0 as
both inputs to the differential gain stage enables offset measurements. Selecting the single-ended channel ADC4
Bit
7
654321
0
REFS1
REFS0
ADLAR
REFS2
MUX3
MUX2
MUX1
MUX0
ADMUX
Read/Write
R/W
Initial Value
0
000000
0
Table 17-3.
Voltage Reference Selections for ADC
REFS2
REFS1
REFS0
Voltage Reference (V
REF) Selection
X0
0
VCC used as Voltage Reference, disconnected from PB0 (AREF).
X0
1
External Voltage Reference at PB0 (AREF) pin, Internal Voltage
Reference turned off.
0
1
0
Internal 1.1V Voltage Reference.
01
1
Reserved
11
0
Internal 2.56V Voltage Reference without external bypass
11
1
Internal 2.56V Voltage Reference with external bypass capacitor at