參數(shù)資料
型號: MCZ33977EG
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Single Gauge Driver
中文描述: 單表驅動
文件頁數(shù): 19/37頁
文件大?。?/td> 402K
代理商: MCZ33977EG
Analog Integrated Circuit Device Data
Freescale Semiconductor
19
33977
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
DEFAULT MODE
Default mode refers to the state of the 33977 after an
internal or external reset prior to SPI communication. An
internal reset occurs during V
DD
power-up or if V
PWR
falls
below 4.0 V. An external reset is initiated by the RST pin
driven to Logic [0]. With the exception of the RTZCR full step
time, all of the specific pin functions and internal registers will
operate as though all of the addressable configuration
register bits were set to Logic [0]. This means, for example,
[deleted PV
that
] the outputs will be disabled after a power-
up or external reset, and SO flag OD6 and OD8 are set,
indicating an undervoltage event. Anytime an external reset
is exerted and the default is restored, all configuration
parameters [replaced e.g. with such as] such as clock
calibration, maximum speed, and RTZ parameters are lost
and must be reloaded.
FAULT LOGIC REQUIREMENTS
The 33977 device indicates each of the following faults as
they occur:
Overtemperature fault
Undervoltage V
PWR
Overvoltage V
PWR
Clock Out of Specification [Formalized spec]
These fault bits remain enabled until they are clocked out
of the SO pin with a valid SPI message.
Overcurrent faults are not reports directly; however, it is
likely an overcurrent condition will become a thermal issue
and be reported.
OVERTEMPERATURE FAULT REQUIREMENTS
The 33977 incorporates overtemperature protection
circuitry, shutting off the gauge driver when an excessive
temperature is detected. In the event of a thermal overload,
the gauge driver is automatically disabled and the fault is
flagged via the OT device status bit. The indicating flag
continues to be set until the gauge is successfully re-enacted,
provided the junction temperature has fallen below the
hysteresis level.
OVERVOLTAGE FAULT REQUIREMENTS
The device is capable of surviving V
PWR
voltages within
the maximum specified in
Maximum Ratings
,
Table 2
. V
PWR
levels resulting in an overvoltage shutdown condition can
result in uncertain pointer positions. Therefore, the pointer
position should be re-calibrated. The master will be notified of
an overvoltage event via the SO pin if the device status is
selected. Overvoltage detection and notification occurs
regardless of whether the gauge(s) are enabled or disabled.
OVERCURRENT FAULT REQUIREMENTS
Outcome currents are limited to safe levels allowing the
device to rely on thermal shutdown to protect itself.
UNDERVOLTAGE FAULT REQUIREMENTS
Undervoltage V
PWR
conditions may result in uncertain
pointer positions. Therefore, the internal clock and the pointer
position may require re-calibration. The state machine
continues to operate with V
PWR
voltage levels as low as 4.0
V; however, the coil voltages may be clipped. Notification of
an undervoltage event is provided via the SO pin.
RESET (SLEEP MODE)
The device can reset internally or externally. If the V
DD
level falls below the V
DDUV
level, the device resets and
powers up in the Default mode. See
Static Electrical
Characteristics
table under the sub-heading:
Power Input
in
Table 3
. Similarly, if the RST pin is driven to Logic [0], then
the device resets to its default state. The device consumes
the least amount of current (I
DD
and I
PWR
) when the RST pin
is Logic [0]. This is also referred to as the Sleep mode.
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